JAJSM31 May   2022 TPS7A74

ADVANCE INFORMATION  

  1. 特長
  2. アプリケーション
  3. 概要
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Enable and Shutdown
      2. 7.3.2 Active Discharge
      3. 7.3.3 Global Undervoltage Lockout (UVLO) Circuit
      4. 7.3.4 Internal Current Limit
      5. 7.3.5 Thermal Shutdown Protection (TSD)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
      3. 7.4.3 Disabled
    5. 7.5 Programming
      1. 7.5.1 Programmable Soft-Start
      2. 7.5.2 Sequencing Requirements
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Adjusting the Output Voltage
      2. 8.1.2 Input, Output, and Bias Capacitor Requirements
      3. 8.1.3 Transient Response
      4. 8.1.4 Dropout Voltage
      5. 8.1.5 Output Noise
      6. 8.1.6 Estimating Junction Temperature
    2. 8.2 Typical Application
      1. 8.2.1 FPGA I/O Supply at 1.8 V With a Bias Rail
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
      1. 10.1.1 Estimating Junction Temperature
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Development Support
        1. 11.1.1.1 Evaluation Modules
        2. 11.1.1.2 Spice Models
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 サポート・リソース
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Typical Characteristics

at TJ = 25°C, VIN = VOUT(nom) + 0.3 V, VBIAS = 5 V, VEN = VIN, CIN = 10 μF, CBIAS = 1 μF, and COUT = 10 μF (unless otherwise noted)

GUID-20220315-SS0I-WKZV-H1ZM-8SKDVQMVVRGM-low.png
CIN = COUT = 10 μF, CBIAS = 1 μF 
Figure 6-1 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 400 mA, VOUT = 1.8 V
GUID-20220315-SS0I-VJVT-4GNP-JM7CG5CNRQT9-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-3 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 1.1 A, VOUT = 1.8 V
GUID-20220315-SS0I-XFPQ-XNV4-RMZNRVCDDMQP-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A
Figure 6-5 PSRR vs Frequency and COUT for VOUT = 1.8 V
GUID-20220331-SS0I-FVQG-TDTS-39SPTKG4WHZ8-low.png
VIN = VOUT + 0.3 V, CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-7 Bias Rail PSRR vs Frequency and IOUT
GUID-20220315-SS0I-HD1C-NQPX-BSLPCQ1RG15F-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-9 Noise vs Frequency and IOUT for VOUT = 3.3 V
GUID-20220315-SS0I-3KBV-BTZK-GPCMPXTV29B8-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 10 mA to 1.5 A to 10 mA
Figure 6-11 Load Transient for VOUT = 3.3 V
GUID-20220315-SS0I-RV0G-WJ9Q-5CVWZPJGT6VB-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VIN = 3.9 V to 5.8 V to 3.9 V
Figure 6-13 Line Transient for VOUT = 3.3 V
GUID-20220315-SS0I-ZZN4-RS3M-CQFNXXM55XW4-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VIN = 1.1 V, VBIAS = 5 V
Figure 6-15 Input Ramp With Fast Soft-Start
GUID-20220315-SS0I-9GWF-8Z1J-KS2GG2ZQ4K37-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-2 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 750 mA, VOUT = 1.8 V
GUID-20220315-SS0I-0QGB-T0QH-2QZ65M31HQHJ-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-4 PSRR vs Frequency and Overhead (OvHd) Voltage for IOUT = 1.5 A, VOUT = 1.8 V
GUID-20220315-SS0I-MKVL-9XRT-S5WPZJNFVP8N-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-6 PSRR vs Frequency and IOUT for VOvHd = 200 mV
GUID-20220315-SS0I-HD1C-NQPX-BSLPCQ1RG15F-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF
Figure 6-8 Noise vs Frequency and IOUT for VOUT = 0.65 V
GUID-20220315-SS0I-0PMT-9XQ8-Q4X2RNLXXLZ9-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 10 mA to 1.5 A to 10 mA
Figure 6-10 Load Transient for VOUT = 0.65 V
GUID-20220315-SS0I-51HL-3TPZ-3KWNWSGK6KZ4-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VIN = 0.95 V to 6 V to 0.95 V
Figure 6-12 Line Transient for VOUT = 0.65 V
GUID-20220315-SS0I-Z0QC-WKNH-V217BJ306WR8-low.png
 CIN = COUT = 10 μF, CBIAS = 1 μF, IOUT = 1.5 A, VBIAS = 5 V
Figure 6-14 Input Ramp-Up and Ramp-Down