JAJSH18A March   2019  – September 2019 TPS7A78

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      ハーフブリッジ構成の標準的な回路図
      2.      フルブリッジ構成の標準的な回路図
  4. 改訂履歴
  5. 概要(続き)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Active Bridge Control
      2. 8.3.2 Full-Bridge (FB) and Half-Bridge (HB) Configurations
      3. 8.3.3 4:1 Switched-Capacitor Voltage Reduction
      4. 8.3.4 Undervoltage Lockout Circuits (VUVLO_SCIN) and (VUVLO_LDO_IN)
      5. 8.3.5 Dropout Voltage Regulation
      6. 8.3.6 Current Limit
      7. 8.3.7 Programmable Power-Fail Detection
      8. 8.3.8 Power-Good (PG) Detection
      9. 8.3.9 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Normal Operation
      2. 8.4.2 Dropout Mode
      3. 8.4.3 Disabled Mode
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Recommended Capacitor Types
      2. 9.1.2 Input and Output Capacitors Requirements
      3. 9.1.3 Startup Behavior
      4. 9.1.4 Load Transient
      5. 9.1.5 Standby Power and Output Efficiency
      6. 9.1.6 Reverse Current
      7. 9.1.7 Switched-Capacitor Stage Output Impedance
      8. 9.1.8 Power Dissipation (PD)
      9. 9.1.9 Estimating Junction Temperature
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Calculating the Cap-Drop Capacitor CS
          1. 9.2.2.1.1 CS Calculations for the Typical Design
        2. 9.2.2.2 Calculating the Surge Resistor RS
          1. 9.2.2.2.1 RS Calculations for the Typical Design
        3. 9.2.2.3 Checking for the Device Maximum ISHUNT Current
          1. 9.2.2.3.1 ISHUNT Calculations for the Typical Design
        4. 9.2.2.4 Calculating the Bulk Capacitor CSCIN
          1. 9.2.2.4.1 CSCIN Calculations for the Typical Design
        5. 9.2.2.5 Calculating the PFD Pin Resistor Dividers for a Power-Fail Detection
          1. 9.2.2.5.1 PFD Pin Resistor Divider Calculations for the Typical Design
        6. 9.2.2.6 Summary of the Typical Application Design Components
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 デバイス・サポート
      1. 12.1.1 開発サポート
        1. 12.1.1.1 評価基板
        2. 12.1.1.2 SIMPLIS モデル
      2. 12.1.2 デバイスの項目表記
    2. 12.2 ドキュメントのサポート
      1. 12.2.1 関連資料
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Full-Bridge (FB) and Half-Bridge (HB) Configurations

The TPS7A78 can be configured to operate either in full-bridge (FB) or half-bridge (HB) configurations. HB configuration ties the AC input pin without the series CS and RS components to the device GND pins. See Figure 14 and Figure 15 for the HB and FB configurations.

TPS7A78 TPS7A78-typical-schematic-HB.gifFigure 14. Typical Schematic Half-Bridge Configuration
TPS7A78 TPS7A78-typical-schematic-FB.gifFigure 15. Typical Schematic Full-Bridge Configuration

NOTE

When FB configuration is used, do not tie the device GNDs to earth GND neither schematically nor accidentally via an earth-grounded oscilloscope or measurement equipment because the device GNDs and earth GND are at different voltage potentials. Doing so and can cause damage to the device and external equipment. Tying the device GND pins to earth GND when FB configuration is used is only acceptable if a second surge resistor RS is used on the AC input pin side without the series CS and first RS, as illustrated in Figure 16 with floating device GND pins and Figure 17 with non-floating (earth grounded) device GND pins.

TPS7A78 TPS7A78-FB_Floating.gifFigure 16. Full-Bridge Floating Device GND
TPS7A78 TPS7A78-FB_Non_Floating.gifFigure 17. Full-Bridge Non-Floating Device GND