JAJSQB6
April 2024
TPS7B92
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagrams
6.3
Feature Description
6.3.1
Wide Supply Range
6.3.2
Low Quiescent Current
6.3.3
Dropout Voltage (VDO)
6.3.4
Current Limit
6.3.5
Leakage Null Control Circuit
6.4
Device Functional Modes
6.4.1
Normal Operation
6.4.2
Dropout Operation
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Setting VOUT for the TPS7B9201 Adjustable LDO
7.2.2.2
External Capacitor Requirements
7.2.2.3
Input and Output Capacitor Requirements
7.2.2.4
Reverse Current
7.2.2.5
Feed-Forward Capacitor (CFF)
7.2.2.6
Power Dissipation (PD)
7.2.2.7
Estimating Junction Temperature
7.2.3
Application Curves
7.3
Best Design Practices
7.4
Power Supply Recommendations
7.5
Layout
7.5.1
Layout Guidelines
7.5.1.1
Power Dissipation
7.5.2
Layout Example
8
Device and Documentation Support
8.1
Device Support
8.1.1
Development Support
8.1.1.1
Evaluation Module
8.1.1.2
Spice Models
8.1.2
Device Nomenclature
8.2
Documentation Support
8.2.1
Related Documentation
8.3
ドキュメントの更新通知を受け取る方法
8.4
サポート・リソース
8.5
Trademarks
8.6
静電気放電に関する注意事項
8.7
用語集
9
Revision History
10
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DBV|5
サーマルパッド・メカニカル・データ
発注情報
jajsqb6_pm
6.2
Functional Block Diagrams
Figure 6-1
Functional Block Diagram: Adjustable Version
Figure 6-2
Functional Block Diagram: Fixed Version