JAJSQB6 April   2024 TPS7B92

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagrams
    3. 6.3 Feature Description
      1. 6.3.1 Wide Supply Range
      2. 6.3.2 Low Quiescent Current
      3. 6.3.3 Dropout Voltage (VDO)
      4. 6.3.4 Current Limit
      5. 6.3.5 Leakage Null Control Circuit
    4. 6.4 Device Functional Modes
      1. 6.4.1 Normal Operation
      2. 6.4.2 Dropout Operation
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Setting VOUT for the TPS7B9201 Adjustable LDO
        2. 7.2.2.2 External Capacitor Requirements
        3. 7.2.2.3 Input and Output Capacitor Requirements
        4. 7.2.2.4 Reverse Current
        5. 7.2.2.5 Feed-Forward Capacitor (CFF)
        6. 7.2.2.6 Power Dissipation (PD)
        7. 7.2.2.7 Estimating Junction Temperature
      3. 7.2.3 Application Curves
    3. 7.3 Best Design Practices
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
        1. 7.5.1.1 Power Dissipation
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Device Support
      1. 8.1.1 Development Support
        1. 8.1.1.1 Evaluation Module
        2. 8.1.1.2 Spice Models
      2. 8.1.2 Device Nomenclature
    2. 8.2 Documentation Support
      1. 8.2.1 Related Documentation
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 Trademarks
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

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発注情報

5.5 Electrical Characteristics

over operating junction temperature range (TJ = –40°C to +125°C), VIN = 2.5V or VIN = VOUT(nom) + 0.5V (whichever is greater), CIN = 1µF, COUT = 1µF, and IOUT = 1mA (unless otherwise noted); typical values are at TJ = 25°C (1)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VIN Input voltage 2.5 40 V
IOUT (2)(3) Maximum output current 300 mA
VFB Feedback voltage VOUT + 3.8V ≤ VIN ≤ 40V, TJ = 25℃ 1.169 1.205 1.237 V
VOUT + 3.8V ≤ VIN ≤ 40V, –40℃ ≤ TJ ≤ 125℃ 1.169 1.205 1.237
VOUT Output voltage VOUT = 1.8V VIN = VOUT + 3.8V, 100µA ≤ IOUT ≤ 300mA, TJ = 25℃ –3.0 4.5 %
VOUT = 3.3V –2.75 4.25
VOUT = 5.0V –3.75 4.25
VOUT = 12V –5.25 5.25
VOUT = 1.8V VIN = VOUT + 3.8V, 100µA ≤ IOUT ≤ 300mA, –40℃ ≤ TJ ≤ 125℃ –3.75 5.0
VOUT = 3.3V –3.5 5.0
VOUT = 5.0V –4.25 4.75
VOUT = 12V –5.75 5.75
ΔVOUT/VIN Line regulation IOUT = 1mA, VOUT + 1V ≤ VIN ≤ 40V 0.00005 0.007 %/V
ΔVOUT/IOUT Load regulation VIN = VOUT + 2V, 100µA ≤ IOUT ≤ 150mA 0.1 %/A
ΔVOUT/IOUT Load regulation VIN = VOUT + 3.8V, 100µA ≤ IOUT ≤ 300mA 0.3 %/A
VDO Dropout voltage IOUT = 50mA 440 700 mV
VDO Dropout voltage IOUT = 150mA 1100 1800 mV
VDO Dropout voltage IOUT = 300mA 2175 3700 mV
ILIM Output current limit VOUT = 0.90*VOUT(nom), VIN = VOUT(nom) + 9V 320 530 740 mA
ISC Short-circuit current limit VOUT = 0V, VIN = VOUT(nom) + 6V 75 175 290 mA
IGND GND pin current VIN = VOUT(nom) + 0.5V,  IOUT = 0mA, TJ = 25℃ (fixed) 1.7 2.65 µA
VIN = VOUT(nom) + 0.5V,  IOUT = 0mA, TJ = 25℃ (adjustable) 1.3 2.65
VIN = VOUT(nom) + 0.5V,  IOUT = 0mA, TJ = –40°C to 85°C 2.9
VIN = VOUT(nom) + 0.5V,  IOUT = 0mA, TJ = –40°C to 125°C 3
VIN = VOUT(nom) + 0.5V,  IOUT = 100µA (fixed) 2.8
VIN = VOUT(nom) + 0.5V,  IOUT = 100µA (adjubstable) 2.4
IGND GND pin current VIN = VOUT(nom) + 3.8V,  IOUT = 300 mA 250 µA
IFB FB pin leakage current VIN = 40V 25 nA
PSRR Power-supply ripple rejection VIN = VOUT(nom) + 1V, IOUT = 50mA, COUT = 0.47µF , f = 10kHz 55 dB
VIN = VOUT(nom) + 1V, IOUT = 50mA, COUT = 0.47µF , f = 100kHz 43
Vn Output noise voltage Bandwidth = 10Hz to 100kHz, VIN = VOUT(nom) + 3.8V, IOUT = 300mA, COUT = 1µF 525 µVRMS
Tsd+ Thermal shutdown temperature increasing Shutdown, temperature increasing 160 °C
Tsd- Thermal shutdown temperature decreasing Reset, temperature decreasing 140 °C
tsup(4) Start-up time 400 µs
(1) Pulse-testing techniques are used to maintain virtual junction temperature as close as possible to ambient temperature; take thermal effects into account separately.
(2) Higher power dissipation across the voltage regulator leads to activation of thermal shutdown circuit, preventing attainment of maximum output current.
(3) Maximum supported power dissipation ratings are listed in Absolute Maximum Rating table. Exceeding these ratings leads to permanent SOA damage to the voltage regulator. 
(4) Start-up time is measured as difference between t = 0 when VIN is ramped at slew rate more than 1V/µs and the time when VOUT reaches 95% of VOUT(nom) value.