JAJSM19B May 2021 – December 2022 TPS7H4002-SP
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
SUPPLY VOLTAGE (VIN AND PVIN PINS) | ||||||
PVIN operating input voltage | 3.0 | 5.5 | V | |||
PVIN internal UVLO threshold | PVIN rising | 2.50 | V | |||
PVIN internal UVLO hysteresis | 450 | mV | ||||
VIN operating input voltage | 3.0 | 5.5 | V | |||
VIN internal UVLO threshold | VIN rising | 2.75 | 3.0 | V | ||
VIN internal UVLO hysteresis | 150 | mV | ||||
VIN shutdown supply current | VEN = 0 V | 1.75 | 3 | mA | ||
VIN operating – non switching supply current | VSENSE = VBG | 2.5 | 5 | mA | ||
ENABLE AND UVLO (EN PIN) | ||||||
Enable threshold | Rising | 1.14 | 1.18 | V | ||
Falling | 1.05 | 1.12 | ||||
Input current | VEN = 1.1 V | 6.1 | μA | |||
Hysteresis current | VEN = 1.3 V | 3.0 | μA | |||
VOLTAGE REFERENCE | ||||||
Voltage reference | 0 A ≤ Iout ≤ 3 A, –55°C | 0.795 | 0.806 | 0.817 | V | |
0 A ≤ Iout ≤ 3 A, 25°C | 0.796 | 0.807 | 0.818 | |||
0 A ≤ Iout ≤ 3 A, 125°C | 0.797 | 0.808 | 0.819 | |||
REFCAP voltage | 470 nF | 1.211 | V | |||
MOSFET | ||||||
High-side switch resistance | PVIN=VIN= 3 V, lead length = 4 mm | 50 | mΩ | |||
High-side switch resistance(1) | PVIN=VIN= 5 V, lead length = 4mm | 45 | mΩ | |||
High-side switch resistance(1) | PVIN=VIN= 5.5 V, lead length = 4 mm | 43 | mΩ | |||
Low-side switch resistance(1) | PVIN=VIN= 3 V, lead length = 4mm | 35 | mΩ | |||
Low-side switch resistance(1) | PVIN=VIN= 5 V, lead length = 4mm | 34 | mΩ | |||
Low-side switch resistance(1) | PVIN=VIN= 5.5 V, lead length = 4mm | 33 | mΩ | |||
ERROR AMPLIFIER | ||||||
Error amplifier transconductance (gm)(2) | –2 μA < ICOMP < 2 μA, V(COMP) = 1 V | 900 | 1400 | 1900 | μS | |
Error amplifier dc gain(2) | VSENSE = 0.8 V | 10000 | V/V | |||
Error amplifier source current(2) | V(COMP) = 1 V, 100-mV input overdrive | 85 | 140 | 185 | μA | |
Error amplifier sink current (2) | V(COMP) = 1 V, 100-mV input overdrive | 85 | 140 | 185 | μA | |
Error amplifier output resistance (2) | 7 | MΩ | ||||
Start switching threshold(2) | 0.25 | V | ||||
COMP to Iswitch gm(2) | -55°C, V(COMP) ≤ 1.1 V | 12 | S | |||
25°C, V(COMP) ≤ 1.1 V | 12 | |||||
125°C, V(COMP) ≤ 1.1 V | 12 | |||||
CURRENT LIMIT | ||||||
High-side switch current limit threshold (3) | VIN = 3 V | 7.9 | A | |||
VIN = 5 V | 6.2 | |||||
VIN = 5.5 V | 6.2 | |||||
Low-side switch sourcing current limit(3) | VIN = 5 V | 8 | A | |||
Low-side switch sinking current limit | VIN = 5 V | 3 | A | |||
SLOPE COMPENSATION | ||||||
Slope compensation | fsw = 100 kHz | -0.69 | A/µs | |||
fsw = 500 kHz | -3.4 | |||||
fsw = 1 MHz | -7.0 | |||||
THERMAL SHUTDOWN | ||||||
Thermal shutdown | 170 | °C | ||||
Thermal shutdown hysteresis | 30 | °C | ||||
INTERNAL SWITCHING FREQUENCY | ||||||
Internally set frequency | RT = Open | 395 | 500 | 585 | kHz | |
Externally set frequency | RT = 100 kΩ (1%) | 395 | 500 | 585 | kHz | |
RT = 487 kΩ (1%) | 80 | 100 | 115 | |||
RT = 47 kΩ (1%) | 900 | 1000 | 1100 | |||
EXTERNAL SYNCHRONIZATION | ||||||
SYNC out low-to-high rise time (10%/90%) | Cload = 25 pF | 70 | 130 | ns | ||
SYNC out high-to-low fall time (90%/10%) | Cload = 25 pF | 6 | 15.5 | ns | ||
Falling edge delay time(5) | 180 | ° | ||||
SYNC out high level threshold | IOH = 50 µA | VIN–0.3 | V | |||
SYNC out low level threshold | IOL = 50 µA | 600 | mV | |||
SYNC in low level threshold | PVIN=VIN= 3 V | 700 | mV | |||
SYNC in high level threshold | PVIN=VIN= 3 V | 2.45 | V | |||
SYNC in low level threshold | PVIN=VIN= 5.5 V | 700 | mV | |||
SYNC in high level threshold | PVIN=VIN= 5.5 V | 4.25 | V | |||
SYNC in frequency range(4) | 100 | 1000 | kHz | |||
PH (PH PIN) | ||||||
Minimum on time | Measured at 10% to 90% of VIN, 25°C, IPH = 2 A | 190 | 235 | ns | ||
SLOW START AND TRACKING (SS/TR PIN) | ||||||
SS charge current | 1.5 | 2.5 | 3 | μA | ||
SS/TR to VSENSE matching | V(SS/TR) = 0.4 V | 30 | 90 | mV | ||
POWER GOOD (PWRGD PIN) | ||||||
VSENSE threshold | VSENSE falling (fault) | 91 | % Vref | |||
VSENSE rising (good) | 94 | |||||
VSENSE rising (fault) | 109 | |||||
VSENSE falling (good) | 106 | |||||
Output high leakage | VSENSE = Vref, V(PWRGD) = 5 V | 30 | 181 | nA | ||
Output low | I(PWRGD) = 2 mA | 0.3 | V | |||
Minimum VIN for valid output | V(PWRGD) < 0.5 V at 100 μA | 0.6 | 1 | V | ||
Minimum SS/TR voltage for PWRGD | 1.55 | V |