JAJSMG4A June   2023  – September 2023 TPS922052 , TPS922053 , TPS922054 , TPS922055

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Adaptive Off-Time Current Mode Control
        1. 8.3.1.1 Switching Frequency Settings
        2. 8.3.1.2 Spread Spectrum
      2. 8.3.2 Setting LED Current
      3. 8.3.3 Undervoltage Lockout
      4. 8.3.4 Internal Soft Start
      5. 8.3.5 Dimming Mode
        1. 8.3.5.1 PWM Dimming
        2. 8.3.5.2 Analog Dimming
        3. 8.3.5.3 Hybrid Dimming
        4. 8.3.5.4 Flexible Dimming
      6. 8.3.6 CC/CV Charging Mode
      7. 8.3.7 Fault Protection
      8. 8.3.8 Thermal Foldback
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 TPS922054 24-V Input, 4-A Output, 4-piece WLED Driver With Analog Dimming
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Inductor Selection
          2. 9.2.1.2.2 Input Capacitor Selection
          3. 9.2.1.2.3 Output Capacitor Selection
          4. 9.2.1.2.4 Sense Resistor Selection
          5. 9.2.1.2.5 Other External Components Selection
        3. 9.2.1.3 Application Curves
      2. 9.2.2 TPS922054 48-V Input, 2-A Output, 12-piece WLED Driver with PWM Dimming
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Inductor Selection
          2. 9.2.2.2.2 Input Capacitor Selection
          3. 9.2.2.2.3 Output Capacitor Selection
          4. 9.2.2.2.4 Sense Resistor Selection
          5. 9.2.2.2.5 Other External Components Selection
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3.5.2 Analog Dimming

The TPS92205x family supports analog dimming which regulates the LED current through the PWM input signal at the ADIM/HD pin. The analog dimming mode is enabled when the EN/PWM pin is always high and the ADIM/HD pin is configured by a PWM input signal.

The internal voltage reference, VREF, starts to rise after the first PWM pulse appears at the ADIM/HD pin. A 1-µs minimum on-time of the first PWM pulse is required for the internal digital circuits to enter the analog dimming mode. VREF continues to increase until the end of second PWM cycle and then changes to the desired value in proportion to the duty cycle of the PWM pulse. The minimum on-time of the PWM pulse after the first is 100 ns for the digital circuits to detect the duty cycle.

VREF is 200 mV when the PWM input signal at the ADIM/HD pin has a 100% duty cycle, for instance, and VREF is 20 mV when the PWM input signal has a 10% duty cycle. The initial change takes approximately 5 ms if VREF is 200 mV. The analog dimming enables 8-bit resolution which corresponds to 0.4% duty cycle step change at the ADIM/HD pin. Also, the circuit is able to respond to the duty cycle change of the PWM input signal with tens of micro-seconds delay.