JAJSON4 May 2022 TPS92643-Q1
PRODUCTION DATA
The TPS92643-Q1 incorporates a 36-V input voltage rated linear regulator to generate the 5-V (typical) VCC bias supply and other internal reference voltages. The device monitors the VCC output to implement UVLO protection. Operation is enabled when VCC exceeds the VCC(UVLO) rising threshold and is disabled when VCC drops below VCC(UVLO) falling threshold. The comparator provides 200 mV of hysteresis to avoid chatter during transitions. The VCC UVLO thresholds are internally fixed and cannot be adjusted. An internal current limit circuit is implemented to protect the device during VCC pin short-circuit conditions. The VCC supply powers the internal circuitry, the low-side gate driver and the bootstrap supply for high-side gate driver. Place a bypass capacitor in the range of 4.7 μF to 10 μF close to the device, across the VCC pin to AGND. The capacitor from VCC must be five times larger than the bootstrap capacitor, CBST to support proper operation. The regulator operates in dropout when input voltage, VIN falls below 5 V, forcing VCC to be lower than VIN by VDO for a 20-mA supply current. The VCC is a regulated output of the internal regulator and is not recommended to be driven from an external power supply.