The TPS929120-Q1 implements a EEPROM CRC check after loading the EEPROM code to configuration register in normal state. The calculated CRC result is sent to register CALC_EEPCRC and compared to the data in EEPROM register EEP_CRC, which stores the CRC code for all EEPROM registers. If the code in register CALC_EEPCRC is not matched to the code in register EEP_CRC, the TPS929120-Q1 pulls the ERR pin down with pulsed current sink for 50 µs to report the fault and set the registers including FLAG_EEPCRC and FLAG_ERR to 1. The master controller must write CLR_FAULT to 1 to clear the fault flags. The CRC code for all the EEPROM registers must be burnt into EEPROM register EEP_CRC in the end of production line. The CRC code algorithm for multiple bytes of binary data is based on the polynomial, X⁸ + X⁵ + X⁴ + 1. The CRC code contain 8 bits binary code, and the initial value is FFh. As described in Figure 7-7, all bits code shift to MSB direction for 1 bit with three exclusive-OR calculation. A new CRC code for one byte input could be generated after repeating the 1 bit shift and three exclusive-OR calculation for 8 times. Based on this logic, the CRC code can be calculated for all the EEPROM register byte. When the EEPROM design for production is finalized, the corresponding CRC code based on the calculation must be burnt to EEPROM register EEP_CRC together with other EEPROM registers in the end of production line. If the DC current for each output channel needs to be calibrated in the end of production for different LED brightness bin, the CRC code for each production devices must be calculated independent and burnt during the calibration. The CRC algorithm must be implemented into the LED calibration system in the end of production line.

Figure 7-7 CRC Algorithm Diagram