JAJSLB9A April   2023  – April 2024 TPS929160-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Device Bias and Power
        1. 6.3.1.1 Power Bias (VBAT)
        2. 6.3.1.2 Enable and Shutdown (EN)
        3. 6.3.1.3 5V Low-Drop-Out Linear Regulator (VLDO)
        4. 6.3.1.4 Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
        5. 6.3.1.5 Power Supply (SUPPLY)
        6. 6.3.1.6 Programmable Low Supply Warning
      2. 6.3.2  Constant Current Output
        1. 6.3.2.1 Reference Current with External Resistor (REF)
        2. 6.3.2.2 64-Step Programmable High-Side Constant-Current Output
      3. 6.3.3  PWM Dimming
        1. 6.3.3.1 PWM Generator
        2. 6.3.3.2 PWM Dimming Frequency
        3. 6.3.3.3 Blank Time
        4. 6.3.3.4 Phase Shift PWM Dimming
        5. 6.3.3.5 Linear Brightness Control
        6. 6.3.3.6 Exponential Brightness Control
      4. 6.3.4  FAIL-SAFE State Operation
      5. 6.3.5  On-Chip, 8-Bit, Analog-to-Digital Converter (ADC)
        1. 6.3.5.1 Minimum On Time for ADC Measurement
        2. 6.3.5.2 ADC Auto Scan
        3. 6.3.5.3 ADC Error
      6. 6.3.6  NSTB Output
      7. 6.3.7  Diagnostic and Protection in NORMAL State
        1. 6.3.7.1  VBAT Undervoltage Lockout Diagnostics in NORMAL state
        2. 6.3.7.2  Low-Supply Warning Diagnostics in NORMAL State
        3. 6.3.7.3  Supply Undervoltage Diagnostics in NORMAL State
        4. 6.3.7.4  Reference Diagnostics in NORMAL state
        5. 6.3.7.5  Pre-Thermal Warning in NORMAL state
        6. 6.3.7.6  Overtemperature Protection in NORMAL state
        7. 6.3.7.7  Overtemperature Shutdown in NORMAL state
        8. 6.3.7.8  LED Open-Circuit Diagnostics in NORMAL state
        9. 6.3.7.9  LED Short-Circuit Diagnostics in NORMAL state
        10. 6.3.7.10 Single-LED Short-Circuit Detection in NORMAL state
        11. 6.3.7.11 EEPROM CRC Error in NORMAL state
        12. 6.3.7.12 Communication Loss Diagnostic in NORMAL state
        13. 6.3.7.13 Fault Masking in NORMAL state
        14.       55
      8. 6.3.8  Diagnostic and Protection in FAIL-SAFE states
        1. 6.3.8.1  Supply Undervoltage Lockout Diagnostics in FAIL-SAFE states
        2. 6.3.8.2  Low-Supply Warning Diagnostics in FAIL-SAFE states
        3. 6.3.8.3  Supply Undervoltage Diagnostics in FAIL-SAFE State
        4. 6.3.8.4  Reference Diagnostics in FAIL-SAFE states
        5. 6.3.8.5  Pre-Thermal Warning in FAIL-SAFE state
        6. 6.3.8.6  Overtemperature Protection in FAIL-SAFE state
        7. 6.3.8.7  Overtemperature Shutdown in FAIL-SAFE state
        8. 6.3.8.8  LED Open-Circuit Diagnostics in FAIL-SAFE state
        9. 6.3.8.9  LED Short-Circuit Diagnostics in FAIL-SAFE state
        10. 6.3.8.10 Single-LED Short-Circuit Detection in FAIL-SAFE state
        11. 6.3.8.11 EEPROM CRC Error in FAIL-SAFE state
        12. 6.3.8.12 Fault Masking in FAIL-SAFE state
        13.       69
      9. 6.3.9  OFAF Setup In FAIL-SAFE state
      10. 6.3.10 ERR Output
    4. 6.4 Device Functional Modes
      1. 6.4.1 POR State
      2. 6.4.2 INITIALIZATION state
      3. 6.4.3 NORMAL state
      4. 6.4.4 FAIL-SAFE state
      5. 6.4.5 PROGRAM state
    5. 6.5 Programming
      1. 6.5.1 FlexWire Protocol
        1. 6.5.1.1 Protocol Overview
        2. 6.5.1.2 UART Interface Address Setting
        3. 6.5.1.3 Status Response
        4. 6.5.1.4 Synchronization Byte
        5. 6.5.1.5 Device Address Byte
        6. 6.5.1.6 Register Address Byte
        7. 6.5.1.7 Data Frame
        8. 6.5.1.8 CRC Frame
        9. 6.5.1.9 Burst Mode
      2. 6.5.2 Registers Lock
      3. 6.5.3 Register Default Data
      4. 6.5.4 EEPROM Programming
        1. 6.5.4.1 Chip Selection by Pulling REF Pin High
        2. 6.5.4.2 Chip Selection by ADDR Pins Configuration
        3. 6.5.4.3 EEPROM Register Access and Burn
        4. 6.5.4.4 EEPROM PROGRAM state Exit
    6. 6.6 Register Maps
      1. 6.6.1 BRT Registers
      2. 6.6.2 IOUT Registers
      3. 6.6.3 CONF Registers
      4. 6.6.4 CTRL Registers
      5. 6.6.5 FLAG Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Smart Rear Lamp with Distributed LED Drivers
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

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メカニカル・データ（パッケージ｜ピン）
  • DCP|38
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発注情報

Table 6-6 Diagnostics Table in NORMAL State
FAULT TYPEDETECTION CRITERIACONDITIONSFAULT ACTIONSFAULT OUTPUTERR PINRECOVERY
VBAT UVLOV(VBAT) < V(POR_falling)
or
V(LDO) < V(LDO_POR_falling)		Device switch to POR stateFLAG_POR
FLAG_ERR		Constant pulled downDevice switch to INIT state when all voltage rails are good.
Clear fault flag with CLRPOR.
Low-supply warningV(SUPPLY) < V(LOWSUPTH)Disable fault type *FLAG_LOWSUP
FLAG_ERR (maskable)		One pulse pulled down for 50 µsAutomatically recovery upon fault removal.
Clear fault flag with CLRFAULT.
Supply undervoltage V(SUPPLY) < V(SUPUV_th_falling) Turn off all outputs FLAG_SUPUV
FLAG_ERR (maskable)		 Constant pulled down (maskable) Automatically recovery and release ERR pin upon fault removal.
Clear fault flag with CLRFAULT.
Reference faultV(REF) < V(REF_SHORT_th)
or
I(REF) < I(REF_OPEN_th)		No actionFLAG_REF
FLAG_ERR (maskable)		Constant pulled down (maskable)Automatically release ERR pin upon fault removal.
Clear fault flag with CLRFAULT.
Pre-thermal warningT(J) > T(PRETSD)No actionFLAG_PRETSD
FLAG_ERR(maskable)		One pulse pulled down for 50 µsClear fault flag with CLRFAULT
Overtemperature protectionT(J) > T(TSD1)Turn off all outputsFLAG_TSD
FLAG_ERR (maskable)		Constant pulled down (maskable)Automatically recover upon fault removal.
Clear fault flag with CLRFAULT.
Overtemperature shutdown T(J) > T(TSD2) Turn off LDO FLAG_POR
FLAG_ERR		 Constant pulled down Device switch to INIT state when all voltage rails are good.
Clear fault flag with CLRPOR.
LED open-circuit fault *V(SUPPLY) - V(OUTXn) < V(OPEN_th_rising)
and
V(SUPPLY) > V(LOWSUPTH)		PWM pulse width greater than
t(BLANK) + t(OPEN_deg)
ENOUTXn = 1
DIAGENOUTXn = 1		No actionFLAG_OPENOUTXn
FLAG_OUT (maskable)
FLAG_ERR (maskable)		One pulse pulled down for 50 µs (maskable)Clear fault flag with CLRFAULT
LED short-circuit faultV(OUTXn) < V(SG_th_rising)PWM pulse width greater than
t(BLANK) + t(SHORT_deg)
ENOUTXn = 1
DIAGENOUTXn = 1		No actionFLAG_SHORTOUTXn
FLAG_OUT (maskable)
FLAG_ERR (maskable)		One pulse pulled down for 50 µs (maskable)Clear fault flag with CLRFAULT
Single-LED short circuit *V(OUTXn) < V(SLSTH)
and
V(SUPPLY) > V(LOWSUPTH)		PWM pulse width greater than
t(BLANK)+ t(SLS_deg)
ENOUTXn = 1
DIAGENOUTXn = 1
SLSEN = 1		No actionFLAG_SLSOUTXn
FLAG_OUT
FLAG_ERR (maskable)		One pulse pulled down for 50 µsClear fault flag with CLRFAULT
EEPROM CRC errorCALC_EEPCRC is different EEPCRCNo actionFLAG_EEPCRC
FLAG_ERR (maskable)		One pulse pulled down for 50 µs (maskable)Clear fault flag with CLRFAULT
Communication loss fault T(WDTIMER) overflows Enter FAIL-SAFE states FLAG_FS No action Set CLRFS to 1 to set the device to NORMAL state