JAJSLB9A April   2023  – April 2024 TPS929160-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Device Bias and Power
        1. 6.3.1.1 Power Bias (VBAT)
        2. 6.3.1.2 Enable and Shutdown (EN)
        3. 6.3.1.3 5V Low-Drop-Out Linear Regulator (VLDO)
        4. 6.3.1.4 Undervoltage Lockout (UVLO) and Power-On-Reset (POR)
        5. 6.3.1.5 Power Supply (SUPPLY)
        6. 6.3.1.6 Programmable Low Supply Warning
      2. 6.3.2  Constant Current Output
        1. 6.3.2.1 Reference Current with External Resistor (REF)
        2. 6.3.2.2 64-Step Programmable High-Side Constant-Current Output
      3. 6.3.3  PWM Dimming
        1. 6.3.3.1 PWM Generator
        2. 6.3.3.2 PWM Dimming Frequency
        3. 6.3.3.3 Blank Time
        4. 6.3.3.4 Phase Shift PWM Dimming
        5. 6.3.3.5 Linear Brightness Control
        6. 6.3.3.6 Exponential Brightness Control
      4. 6.3.4  FAIL-SAFE State Operation
      5. 6.3.5  On-Chip, 8-Bit, Analog-to-Digital Converter (ADC)
        1. 6.3.5.1 Minimum On Time for ADC Measurement
        2. 6.3.5.2 ADC Auto Scan
        3. 6.3.5.3 ADC Error
      6. 6.3.6  NSTB Output
      7. 6.3.7  Diagnostic and Protection in NORMAL State
        1. 6.3.7.1  VBAT Undervoltage Lockout Diagnostics in NORMAL state
        2. 6.3.7.2  Low-Supply Warning Diagnostics in NORMAL State
        3. 6.3.7.3  Supply Undervoltage Diagnostics in NORMAL State
        4. 6.3.7.4  Reference Diagnostics in NORMAL state
        5. 6.3.7.5  Pre-Thermal Warning in NORMAL state
        6. 6.3.7.6  Overtemperature Protection in NORMAL state
        7. 6.3.7.7  Overtemperature Shutdown in NORMAL state
        8. 6.3.7.8  LED Open-Circuit Diagnostics in NORMAL state
        9. 6.3.7.9  LED Short-Circuit Diagnostics in NORMAL state
        10. 6.3.7.10 Single-LED Short-Circuit Detection in NORMAL state
        11. 6.3.7.11 EEPROM CRC Error in NORMAL state
        12. 6.3.7.12 Communication Loss Diagnostic in NORMAL state
        13. 6.3.7.13 Fault Masking in NORMAL state
        14.       55
      8. 6.3.8  Diagnostic and Protection in FAIL-SAFE states
        1. 6.3.8.1  Supply Undervoltage Lockout Diagnostics in FAIL-SAFE states
        2. 6.3.8.2  Low-Supply Warning Diagnostics in FAIL-SAFE states
        3. 6.3.8.3  Supply Undervoltage Diagnostics in FAIL-SAFE State
        4. 6.3.8.4  Reference Diagnostics in FAIL-SAFE states
        5. 6.3.8.5  Pre-Thermal Warning in FAIL-SAFE state
        6. 6.3.8.6  Overtemperature Protection in FAIL-SAFE state
        7. 6.3.8.7  Overtemperature Shutdown in FAIL-SAFE state
        8. 6.3.8.8  LED Open-Circuit Diagnostics in FAIL-SAFE state
        9. 6.3.8.9  LED Short-Circuit Diagnostics in FAIL-SAFE state
        10. 6.3.8.10 Single-LED Short-Circuit Detection in FAIL-SAFE state
        11. 6.3.8.11 EEPROM CRC Error in FAIL-SAFE state
        12. 6.3.8.12 Fault Masking in FAIL-SAFE state
        13.       69
      9. 6.3.9  OFAF Setup In FAIL-SAFE state
      10. 6.3.10 ERR Output
    4. 6.4 Device Functional Modes
      1. 6.4.1 POR State
      2. 6.4.2 INITIALIZATION state
      3. 6.4.3 NORMAL state
      4. 6.4.4 FAIL-SAFE state
      5. 6.4.5 PROGRAM state
    5. 6.5 Programming
      1. 6.5.1 FlexWire Protocol
        1. 6.5.1.1 Protocol Overview
        2. 6.5.1.2 UART Interface Address Setting
        3. 6.5.1.3 Status Response
        4. 6.5.1.4 Synchronization Byte
        5. 6.5.1.5 Device Address Byte
        6. 6.5.1.6 Register Address Byte
        7. 6.5.1.7 Data Frame
        8. 6.5.1.8 CRC Frame
        9. 6.5.1.9 Burst Mode
      2. 6.5.2 Registers Lock
      3. 6.5.3 Register Default Data
      4. 6.5.4 EEPROM Programming
        1. 6.5.4.1 Chip Selection by Pulling REF Pin High
        2. 6.5.4.2 Chip Selection by ADDR Pins Configuration
        3. 6.5.4.3 EEPROM Register Access and Burn
        4. 6.5.4.4 EEPROM PROGRAM state Exit
    6. 6.6 Register Maps
      1. 6.6.1 BRT Registers
      2. 6.6.2 IOUT Registers
      3. 6.6.3 CONF Registers
      4. 6.6.4 CTRL Registers
      5. 6.6.5 FLAG Registers
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Smart Rear Lamp with Distributed LED Drivers
      2. 7.2.2 Design Requirements
      3. 7.2.3 Detailed Design Procedure
      4. 7.2.4 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 ドキュメントの更新通知を受け取る方法
    2. 8.2 サポート・リソース
    3. 8.3 Trademarks
    4. 8.4 静電気放電に関する注意事項
    5. 8.5 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DCP|38
サーマルパッド・メカニカル・データ
発注情報

5.7 Typical Characteristics

GUID-20230228-SS0I-M6NF-XGC2-JQSBQ0VKW3Z2-low.svg
REFRANGE = 11b
PWMOUTXn=0, all-output ON
Figure 5-1 Standby Current vs REF Resistor
GUID-20230228-SS0I-PTTZ-9PT3-HSHW4SGTBPWN-low.svg
Figure 5-3 Output Current vs Dropout Voltage
GUID-20230228-SS0I-9PS3-PNFJ-BWHK0NNGLPML-low.svg
Figure 5-5 Output Current vs Supply Voltage
GUID-20230228-SS0I-JLBV-DT0B-LZJK5CPN9R3G-low.svg
Figure 5-7 Output DC Current vs IOUT[5:0]
GUID-20230228-SS0I-K2DG-6KHM-ZCCQTMDVD5Q7-low.svg
Figure 5-9 LDO Output Load Regulation
GUID-20230228-SS0I-HPW6-VS7K-V5PGGJ090K6N-low.svg
Figure 5-11 ADC Sampling Result vs Sampled Channel Voltage
GUID-20230228-SS0I-LWPZ-SMMM-XBDQP7NQZQTR-low.svg
REFRANGE = 11b
IOUTXn[5:0]=3Fh
Figure 5-2 Output Current vs REF Resistor
GUID-20230228-SS0I-WZ8K-PBF7-MFLBGXJ698BX-low.svg
Figure 5-4 Output Current vs Dropout Voltage
GUID-20230228-SS0I-PJN5-LFHM-RGXNT3KNTPXS-low.svg
Figure 5-6 Average Current vs PWMOUT[7:0]
GUID-20230228-SS0I-KGSM-3QV7-SBJHJ1V8PCKF-low.svg
Figure 5-8 LDO Output Line Regulation
GUID-20230228-SS0I-WZRQ-FCSN-CC8TM5XZXMFM-low.svg
Figure 5-10 ADC Sampling Result vs Sampled Supply Voltage
GUID-20230228-SS0I-NSTZ-FSG1-6GLJMWLR0N1J-low.svg
Ch1 = V(SUPPLY) Ch2 = V(OUTA0) Ch3 = V(OUTB0)
Ch4 = I(OUTC0)
Figure 5-12 PWM Dimming at 200Hz
GUID-20230228-SS0I-HMLD-PM4P-SFC5BMVGN502-low.svg
Ch1 = V(SUPPLY) Ch2 = V(OUTA0) Ch3 = V(OUTB0)
Ch4 = I(OUTC0)
Figure 5-14 Phase Shift PWM Dimming at 200Hz
GUID-20230228-SS0I-DDPJ-7RB1-1M8QG06HDRGL-low.svg
Ch1 = V(SUPPLY) Ch2 = V(OUTA0) Ch3 = V(ERR)
Ch4 = I(OUTC0)
Figure 5-16 Supply Dimming in FAIL-SAFE Mode at 200Hz
GUID-20230228-SS0I-F1JS-PQK0-2TVWHCZL3LRH-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-18 Transient Overvoltage
GUID-20230228-SS0I-HRXC-SV9L-M4DSWVBPDDL7-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-20 Superimposed Alternating Voltage 15Hz
GUID-20230228-SS0I-X074-X3FT-STB6M8PCKCPZ-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = V(LDO) Ch5 = I(OUTA0)
Figure 5-22 Slow Decrease and Quick Increase of Supply Voltage
GUID-20230228-SS0I-XRRK-CLXT-VH51GZKLSBBW-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(LDO)
Ch4 = I(LDO)
Figure 5-24 LDO Output Load Transient
GUID-20230228-SS0I-TXWG-HJ2H-7ZJMND1PGVLB-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-26 LED Short-Circuit Detection in Normal Mode
GUID-20230228-SS0I-RJZN-08XF-SKSWDWNNCKR4-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-28 LED Open-Circuit Detection in FS Mode
GUID-20230228-SS0I-98LZ-DRPX-PQRNXTV9CNVQ-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-30 LED Short-Circuit Detection in Fail-Safe Mode
GUID-20230228-SS0I-JVNZ-PS55-GNSKMPNLJW6L-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-32 Single-LED Short-Circuit Detection in Fail-Safe Mode
GUID-20230228-SS0I-QHLL-JGVV-NGQDHBBZV8RZ-low.svg
Ch1 = V(SUPPLY) Ch2 = V(OUTA0) Ch3 = V(OUTB0)
Ch4 = I(OUTC0)
Figure 5-13 PWM Dimming at 2000Hz
GUID-20230228-SS0I-SPJV-JXF9-L0PWZTNQFNVR-low.svg
Ch1 = V(SUPPLY) Ch2 = V(OUTA0) Ch3 = V(OUTB0)
Ch4 = I(OUTC0)
Figure 5-15 Phase Shift PWM Dimming at 2000Hz
GUID-20230228-SS0I-XZVF-50HF-TVHCG75DRB23-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-17 Transient Undervoltage
GUID-20230228-SS0I-XGM8-CC31-NXVFPBQMTPTJ-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-19 Jump Start
GUID-20230228-SS0I-QKQ6-W4FM-B7LQSCWRR02W-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-21 Superimposed Alternating Voltage 1 kHz
GUID-20230228-SS0I-TV8S-MSKS-P5VNMN60GSXG-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = V(LDO) Ch5 = I(OUTA0)
Figure 5-23 Slow Decrease and Slow Increase of Supply Voltage
GUID-20230228-SS0I-G9CC-CTLM-M5QQ682PSRKR-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-25 LED Open-Circuit Detection in Normal Mode
GUID-20230228-SS0I-FLWW-VRP3-FBTQKRF2TBRM-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-27 Single-LED Short-Circuit Detection in Normal Mode
GUID-20230228-SS0I-MWTT-QJML-NGTVQRMKRM9R-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-29 LED Open-Circuit Recovery in FS Mode
GUID-20230228-SS0I-2DMJ-PZSH-71B88MMTVVQS-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-31 LED Short-Circuit Recovery in Fail-Safe Mode
GUID-20230228-SS0I-0GQV-MLRM-NWNTSDDN3BVD-low.svg
Ch1 = V(SUPPLY) Ch2 = V(ERR) Ch3 = V(OUTA0)
Ch4 = I(OUTA0)
Figure 5-33 Single-LED Short-Circuit Recovery in Fail-Safe Mode