JAJSFO6G December   2015  – July 2024 TPS99000-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics—Transimpedance Amplifier Parameters
    6. 5.6  Electrical Characteristics—Digital to Analog Converters
    7. 5.7  Electrical Characteristics—Analog to Digital Converter
    8. 5.8  Electrical Characteristics—FET Gate Drivers
    9. 5.9  Electrical Characteristics—Photo Comparator
    10. 5.10 Electrical Characteristics—Voltage Regulators
    11. 5.11 Electrical Characteristics—Temperature and Voltage Monitors
    12. 5.12 Electrical Characteristics—Current Consumption
    13. 5.13 Power-Up Timing Requirements
    14. 5.14 Power-Down Timing Requirements
    15. 5.15 Timing Requirements—Sequencer Clock
    16. 5.16 Timing Requirements—Host and Diagnostic Port SPI Interface
    17. 5.17 Timing Requirements—ADC Interface
    18. 5.18 Switching Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Illumination Control
        1. 6.3.1.1 Illumination System High Dynamic Range Dimming Overview
        2. 6.3.1.2 Illumination Control Loop
        3. 6.3.1.3 Continuous Mode Operation
          1. 6.3.1.3.1 Output Capacitance in Continuous Mode
          2. 6.3.1.3.2 Continuous Mode Driver Distortion and Blanking Current
          3. 6.3.1.3.3 Continuous Mode S_EN2 Dissipative Load Shunt Options
          4. 6.3.1.3.4 Continuous Mode Constant OFF Time
          5. 6.3.1.3.5 Continuous Mode Current Limit
        4. 6.3.1.4 Discontinuous Mode Operation
          1. 6.3.1.4.1 Discontinuous Mode Pulse Width Limit
          2. 6.3.1.4.2 COMPOUT_LOW Timer in Discontinuous Operation
          3. 6.3.1.4.3 Dimming Within Discontinuous Operation Range
          4. 6.3.1.4.4 Multiple Pulse Heights to Increase Bit Depth
          5. 6.3.1.4.5 TIA Gain Adjustment
          6. 6.3.1.4.6 Current Limit in Discontinuous Mode
          7. 6.3.1.4.7 CMODE Big Cap Mode in Discontinuous Operation
      2. 6.3.2 Over-Brightness Detection
        1. 6.3.2.1 Photo Feedback Monitor BIST
        2. 6.3.2.2 Excessive Brightness BIST
      3. 6.3.3 Analog to Digital Converter
        1. 6.3.3.1 Analog to Digital Converter Input Table
      4. 6.3.4 Power Sequencing and Monitoring
        1. 6.3.4.1 Power Monitoring
      5. 6.3.5 DMD Mirror Voltage Regulator
      6. 6.3.6 Low Dropout Regulators
      7. 6.3.7 System Monitoring Features
        1. 6.3.7.1 Windowed Watchdog Circuits
        2. 6.3.7.2 Die Temperature Monitors
        3. 6.3.7.3 External Clock Ratio Monitor
      8. 6.3.8 Communication Ports
        1. 6.3.8.1 Serial Peripheral Interface (SPI)
    4. 6.4 Device Functional Modes
      1. 6.4.1 OFF
      2. 6.4.2 STANDBY
      3. 6.4.3 POWERING_DMD
      4. 6.4.4 DISPLAY_RDY
      5. 6.4.5 DISPLAY_ON
      6. 6.4.6 PARKING
      7. 6.4.7 SHUTDOWN
    5. 6.5 Register Maps
      1. 6.5.1 System Status Registers
      2. 6.5.2 ADC Control
      3. 6.5.3 General Fault Status
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 HUD
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Application Design Considerations
          1. 7.2.1.2.1 Photodiode Considerations
          2. 7.2.1.2.2 LED Current Measurement
          3. 7.2.1.2.3 Setting the Current Limit
          4. 7.2.1.2.4 Input Voltage Variation Impact
          5. 7.2.1.2.5 Discontinuous Mode Photo Feedback Considerations
          6. 7.2.1.2.6 Transimpedance Amplifiers (TIAs, Usage, Offset, Dark Current, Ranges, RGB Trim)
      2. 7.2.2 Headlight
        1. 7.2.2.1 Design Requirements
  9. 8 Power Supply Recommendations
    1. 8.1 TPS99000-Q1 Power Supply Architecture
    2. 8.2 TPS99000-Q1 Power Outputs
    3. 8.3 Power Supply Architecture
  10. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 Power/High Current Signals
      2. 9.1.2 Sensitive Analog Signals
      3. 9.1.3 High-Speed Digital Signals
      4. 9.1.4 High Power Current Loops
      5. 9.1.5 Kelvin Sensing Connections
      6. 9.1.6 Ground Separation
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.5.1 System Status Registers

ADDRESSNAMEBITSDESCRIPTION
Chip Revision ID, R-only, Reset Value 0000
0x00Unused[15:8]Unused
Major[7:4]Major revision
Minor[3:0]Minor revision
Status Set, R/W, Reset Value 0000 (Writing a 1 to any bit field sets flag)
0x01PG Fault Status[15]Asserted when any bin in user register 38h is set
DM Max width limit[14]Maximum DM pulse width achieved. This may or may not be an error, depending on system operational mode
VXPG Init[13]Power good timer for VOFS, VRST, or VBIAS expired
Main SPI parity error[12]Parity error on a SPI1 port transaction occurred (command or write data) on previous command
ADC block error[11]"OR" of all errors in ADC block. Refer to x0D to determine specific error.
Checksum error 3[10]Checksum error in LED / dimming controller section
Checksum error 2[9]Checksum error in light sensor conditioning section
Checksum error 1[8]Checksum error in ADC sub-system section
WD2[7]Watchdog #2 error
WD1[6]Watchdog #1 error
Top level state change[5]Indicates top level state machine has changed state. Can be used to indicate that the TPS99000-Q1 has exited DISPLAY state unexpectedly due to a random fault
Excessive brightness[4]Excessive brightness detector indicates an over bright fault condition
VXPG Fault[3]Set 1 by hardware if power good fault occurs for VOFS, VRST, or VBIAS
DIE Over temp warning[2]Thermal conditions on chip have reached the warning level. If temperature continues to rise, system will reach die over temp error temperature and emergency actions will be taken by TPS99000-Q1
DIE Over temp error[1]Thermal conditions on chip have reached the emergency/error. Emergency actions will be taken by TPS99000-Q1 to protect the system. This error bit is non-maskable for PARKZ output
PROJ_ON_LOW[0]Projector ON input pin is low (produces a 1 on this status bit).
General Status 1, R-only, Reset Value 0000
0x05Clock ratio monitor[15:12]Mid-scale reading (1000 ± 1) indicate approximately 30-MHz external signal has been applied
Open[11:8]Reserved
Last Reset (2:0)[7:5]Root cause of last reset cycle, last pass through the OFF state.
“000” – true power on cycle, internal reset set/release
“001” –  PROJ_ON went low
“010” – watchdog timer 1 error
“011” – watchdog timer 2 error
“100” – die over temperature error
“101” – SW power cycle command
all others unused
Top State (4:0)[4:0]Top level state machine current state
0x00 = SHUTDOWN
0x01 = Internal initialization
0x02 = OFF
0x03 = Internal initialization
0x04 = Initializing 1P1V
0x05 = Initializing 1P8V
0x06 = Initializing 3P3V
0x07 = De-assert RESETZ
0x08 = STANDBY
0x09 = VOFFSET enabled
0x0A = VBIAS enabled
0x0B = VRESET enabled
0x0C = DISPLAY READY
0x0D = DISPLAY ON
0x0E = Parking initialized
0x0F = VBIAS and VRESET disabled
0x10 = VOFFSET disabled
0x11 = DMD voltage discharge