JAJSL21 june   2023 TPSI2072-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Avalanche Robustness
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Dielectric Withstand Testing (HiPot)
      2. 9.2.2 Design Requirements
      3. 9.2.3 Design Procedure - Chassis Ground Reference
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

9.2.3 Design Procedure - Chassis Ground Reference

GUID-20230524-SS0I-F05D-HH6V-FRPGHHFQ4F6K-low.svg Figure 9-11 Chassis Ground Reference

RISO1, RISO2 Selection

In order to protect the TPSI2072-Q1, RISO1 and RISO2 must be sized to limit the current in an overvoltage condition. The amount of resistance required to protect the TPSI2072-Q1 depends on the amount of overvoltage applied. For example, during a dielectric withstand voltage test (HiPot) of 2850 V for 5 seconds, the S1 to SM voltage and the SM to S2 voltage will be clamped to 650 V (VAVA minimum) by the TPSI2072-Q1 and the RISO1, RISO2 resistances required to keep the current under 2 mA would be 1.1 MΩ.

Equation 7. I A V A = V H I P O T - V A V A R I S O 1 = 2850 V - 650 V 1.1   M Ω = 2 . 0 m A

If the high potential test lasts for 60 seconds, the RISO1, RISO2 resistances must be doubled to 2.2 MΩ to keep the current below 1 mA.

DC Overvoltage

RISO1, ISO2 Minimum (5 second intervals)

RISO1, RISO2 Minimum (60 second intervals)

2000 V

675 kΩ

1350 kΩ

2850 V

1100 kΩ

2200 kΩ

3500 V

1425 kΩ

2850 kΩ

4300 V

1825 kΩ

3650 kΩ