JAJSL21 june   2023 TPSI2072-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1. 5.1 Pin Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Avalanche Robustness
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Dielectric Withstand Testing (HiPot)
      2. 9.2.2 Design Requirements
      3. 9.2.3 Design Procedure - Chassis Ground Reference
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 ドキュメントの更新通知を受け取る方法
    2. 10.2 サポート・リソース
    3. 10.3 Trademarks
    4. 10.4 静電気放電に関する注意事項
    5. 10.5 用語集
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.6 Insulation Specifications

PARAMETER TEST CONDITIONS VALUE UNIT
IEC 60664-1
CLR External clearance(1) Shortest terminal-to-terminal distance through air >8 mm
CPG External Creepage(1) Shortest terminal-to-terminal distance across the package surface >8 mm
DTI Distance through the insulation Minimum internal gap (internal clearance) >10.5 µm
CTI Comparative tracking index DIN EN 60112 (VDE 0303-11); IEC 60112 >600 V
Material Group According to IEC 60664-1 I
Overvoltage category per IEC 60664-1 Rated mains voltage ≤ 300 VRMS I-IV
Rated mains voltage ≤ 600 VRMS I-III
Rated mains voltage ≤ 1000 VRMS I-II
DIN V VDE 0884-11:2017-01(2), IEC 60747-17:2020
VIORM Maximum repetitive peak isolation voltage AC voltage (bipolar) 1414 VPK
VIOWM Maximum isolation working voltage AC voltage (sine wave) 1000 VRMS
DC voltage 1500 VDC
VIOTM Maximum transient isolation voltage VTEST = VIOTM, t = 60 s (qualification) 5300 VPK
VTEST = 1.2 × VIOTM, t = 1 s (100% production) 6360 VPK
VIOSM Maximum surge isolation voltage(3) Tested in oil per IEC 62638-1, 1.2/50 µs waveform, VTEST = 1.3 × VIOSM = 6500 VPK (qualification) 5000 VPK
qpd Apparent charge(4) Method a: After I/O safety test subgroup 2/3,Vini = VIOTM, tini = 60 s; Vpd(m) = 1.2 × VIORM = 1800 VPK, tm = 10 s ≤5 pC
Method a: After environmental tests subgroup 1, Vini = VIOTM, tini = 60 s; Vpd(m) = 1.3 × VIORM = 1950 VPK, tm = 10 s ≤5
Method b1: At routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s; Vpd(m) = 1.5 × VIORM = 2250 VPK, tm = 1 s ≤5
CIO Barrier capacitance, input to output(5) VIO = 0.4 × sin (2πft), f = 1 MHz 4 pF
RIO Insulation resistance, input to output(5) VIO = 500 V, TA = 25°C >1012 Ω
VIO = 500 V, 100°C ≤ TA ≤ 125°C >1011
VIO = 500 V at TS = 150°C >109
Pollution degree 2
Climatic category 40/150/21
UL 1577
VISO Withstand isolation voltage VTEST = VISO, t = 60 s (qualification)
VTEST = 1.2 × VISO, t = 1 s (100% production)		 3750 VRMS
Misc.
VISO Withstand isolation voltage 5300 VDC
(1) Creepage and clearance requirements should be applied according to the specific equipment isolation standards of an application. Care should be taken to maintain the creepage and clearance distance of a board design to ensure that the mounting pads of the isolator on the printed-circuit board do not reduce this distance. Creepage and clearance on a printed-circuit board become equal in certain cases. Techniques such as inserting grooves, ribs, or both on a printed-circuit board are used to help increase these specifications.
(2) This coupler is suitable for safe electrical insulation only within the safety ratings. Compliance with the safety ratings shall be ensured by means of suitable protective circuits.
(3) Testing is carried out in air or oil to determine the intrinsic surge immunity of the isolation barrier.
(4) Apparent charge is electrical discharge caused by a partial discharge (pd).
(5) All pins on each side of the barrier tied together creating a two-pin device.