JAJSL38 December   2023 TPSI3100-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Insulation Characteristic Curves
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Transmission of the Enable State
      2. 8.3.2 Power Transmission
      3. 8.3.3 Gate Driver
      4. 8.3.4 Chip Enable (CE)
      5. 8.3.5 Comparators
        1. 8.3.5.1 Fault Comparator
        2. 8.3.5.2 Alarm Comparator
        3. 8.3.5.3 Comparator De-glitch
      6. 8.3.6 VDDP, VDDH, and VDDM Under-voltage Lockout (UVLO)
      7. 8.3.7 Thermal Shutdown
    4. 8.4 Device Operation
    5. 8.5 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 CDIV1, CDIV2 Capacitance
        2. 9.2.2.2 Start-up Time and Recovery Time
        3. 9.2.2.3 RSHUNT, R1, and R2 Selection
        4. 9.2.2.4 Over-current Fault Error
        5. 9.2.2.5 Over-current Alarm Error
        6. 9.2.2.6 VDDP Capacitance, CVDDP
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
  • DVX|16
サーマルパッド・メカニカル・データ
発注情報

9.2.2.4 Over-current Fault Error

There are several sources of error that contribute to total error in the over-current detection accuracy. These include:

  1. Voltage reference tolerance (includes comparator offset)
  2. Current sense amplifier gain error
  3. Current sense amplifier offset
  4. Shunt resistor tolerance
  5. Divider resistor tolerances

For this design, an over-current protection accuracy of ± 10% is required. The comparator offset and voltage reference tolerance of the TPSI3100-Q1 can be found in the Electrical Characteristics section of the data sheet.

The error contribution due to the current sense amplifier offset can be estimated as follows:

Equation 13. % E r r C S A _ o f f s e t = 100 % × V C S A _ O F F S E T I O C P × R S H U N T = 100 % × 0.5 m V 10   A × 3   m Ω = ± 1.7   %

The resistor tolerances of the resistor divider are chosen as 1%. The current sense amplifier gain error is 1%. The reference voltage tolerance is ± 1.5%. Lastly, the selected shunt resistor tolerance is ± 1%

It is assumed that all error contributors are independent variables, so that the total expected error adds in a root mean squared fashion as follows:

Equation 14. % E r r O C P _ T O T A L = % E r r C S A _ o f f s e t 2 + % E r r V R E F 2 + % E r r R 1 2 + % E r r R 2 2 + % E r r R S H U N T 2 + % E r r G A I N 2 0.5
Equation 15. % E r r O C P _ T O T A L = 1.7 % 2 + 1.5 % 2 + 1 % 2 + 1 % 2 + 1 % 2 + 1 % 2 0.5 = 3.0   %