JAJSI06B September   2019  – July 2024 TPSM82810 , TPSM82813

PRODMIX  

  1.   1
  2. 特長
  3. アプリケーション
  4. 概要
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Thermal Information
    6. 6.6 Electrical Characteristics
    7. 6.7 Typical Characteristics
  8. Parameter Measurement Information
    1. 7.1 Schematic
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precise Enable (EN)
      2. 8.3.2 Output Discharge
      3. 8.3.3 COMP/FSET
      4. 8.3.4 MODE/SYNC
      5. 8.3.5 Spread Spectrum Clocking (SSC) - TPSM8281xS
      6. 8.3.6 Undervoltage Lockout (UVLO)
      7. 8.3.7 Power-Good Output (PG)
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (PFM/PWM)
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short Circuit Protection
      5. 8.4.5 Soft Start / Tracking (SS/TR)
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Programming the Output Voltage
        3. 9.2.2.3 Feedforward capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Voltage Tracking
      2. 9.3.2 Synchronizing to an External Clock
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
        1. 9.5.2.1 Thermal Consideration
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

Soft Start / Tracking (SS/TR)

The internal soft-start circuitry controls the output voltage slope during start-up. This control avoids excessive inrush current and makes sure of a controlled output voltage rise time. This control also prevents unwanted voltage drops from high impedance power sources or batteries. When EN is set high, the device starts switching after a delay of about 200μs. Then VOUT rises with a slope controlled by an external capacitor connected to the SS/TR pin.

A capacitor connected from SS/TR to GND is charged with 2.5µA by an internal current source during soft start until the capacitor reaches the reference voltage of 0.6V. After reaching 0.6V, the SS/TR pin voltage is clamped internally while the SS/TR pin voltage keeps rising to a maximum of about 3.3V. The capacitance required to set a certain ramp-time (tramp) is:

Equation 9. TPSM82810 TPSM82813

Leaving the SS/TR pin un-connected provides the fastest start-up ramp of 150µs typically. If the device is set to shutdown (EN = GND), undervoltage lockout, or thermal shutdown, an internal resistor pulls the SS/TR pin to GND tomake sure of a proper low level. Returning from those states causes a new start-up sequence.

A voltage applied at the SS/TR pin can also be used to track a controller voltage. The output voltage follows this voltage in both directions up and down in forced PWM mode. In PFM mode, the output voltage decreases based on the load current. An external voltage applied on SS/TR is internally clamped to the feedback voltage (0.6V). TI recommends to set the final value of the external voltage on SS/TR to be slightly above 0.6V to make sure the device operates with the internal reference voltage when the power-up sequencing is finished. See Section 9.3.1.