JAJSI06C September   2019  – December 2024 TPSM82810 , TPSM82813

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Schematic
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precise Enable (EN)
      2. 8.3.2 Output Discharge
      3. 8.3.3 COMP/FSET
      4. 8.3.4 MODE/SYNC
      5. 8.3.5 Spread Spectrum Clocking (SSC) - TPSM8281xS
      6. 8.3.6 Undervoltage Lockout (UVLO)
      7. 8.3.7 Power-Good Output (PG)
      8. 8.3.8 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (PFM/PWM)
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short Circuit Protection
      5. 8.4.5 Soft Start / Tracking (SS/TR)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Custom Design With WEBENCH® Tools
        2. 9.2.2.2 Setting the Output Voltage
        3. 9.2.2.3 Feedforward capacitor
        4. 9.2.2.4 Input Capacitor
        5. 9.2.2.5 Output Capacitor
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Voltage Tracking
      2. 9.3.2 Synchronizing to an External Clock
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Examples
        1. 9.5.2.1 Thermal Consideration
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
      2. 10.1.2 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 ドキュメントの更新通知を受け取る方法
    4. 10.4 サポート・リソース
    5. 10.5 Trademarks
    6. 10.6 静電気放電に関する注意事項
    7. 10.7 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • SIL|14
サーマルパッド・メカニカル・データ
発注情報

9.5.2 Layout Examples

The example below shows a cut-out from the layout of the MagPack evaluation module. To further reduce EMI, current loops are kept small and noisy traces kept short.

TPSM82810 TPSM82813 Example Layout VCA Package Figure 9-38 Example Layout VCA Package
The same rules also apply to the layout with the SIL package. The pin-outs of both the SIL and the VCA package are optimized for short connections between the device and input or output capacitors. The copper keepout (only for the SIL package) is for top copper layer only. Other PCBs layers can enter this keepout.
TPSM82810 TPSM82813 Example Layout SIL Package Figure 9-39 Example Layout SIL Package