JAJSPV2
august 2023
TPSM8S6C24
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
概要 (続き)
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Average Current-Mode Control
8.3.1.1
On-Time Modulator
8.3.1.2
Current Error Integrator
8.3.1.3
Voltage Error Integrator
8.3.2
Linear Regulators
8.3.3
AVIN and PVIN Pins
8.3.4
Input Undervoltage Lockout (UVLO)
8.3.4.1
Fixed AVIN UVLO
8.3.4.2
Fixed VDD5 UVLO
8.3.4.3
Programmable PVIN UVLO
8.3.4.4
EN/UVLO Pin
8.3.5
Start-Up and Shutdown
8.3.6
Differential Sense Amplifier and Feedback Divider
8.3.7
Set Output Voltage and Adaptive Voltage Scaling (AVS)
8.3.7.1
Reset Output Voltage
8.3.7.2
Soft Start
8.3.8
Prebiased Output Start-Up
8.3.9
Soft Stop and (65h) TOFF_FALL Command
8.3.10
Power Good (PGOOD)
8.3.11
Set Switching Frequency
8.3.12
Frequency Synchronization
8.3.13
Loop Follower Detection
8.3.14
Current Sensing and Sharing
8.3.15
Telemetry
8.3.16
Overcurrent Protection
8.3.17
Overvoltage, Undervoltage Protection
8.3.18
Overtemperature Management
8.3.19
Fault Management
8.3.20
Back-Channel Communication
8.3.21
Switching Node (SW)
8.3.22
PMBus General Description
8.3.23
PMBus Address
8.3.24
PMBus Connections
8.4
Device Functional Modes
8.4.1
Programming Mode
8.4.2
Standalone, Loop Controller, Loop Follower Mode Pin Connections
8.4.3
Continuous Conduction Mode
8.4.4
Operation With CNTL Signal (EN/UVLO)
8.4.5
Operation with (01h) OPERATION Control
8.4.6
Operation with CNTL and (01h) OPERATION Control
8.5
Programming
8.5.1
Supported PMBus Commands
8.5.2
Pin Strapping
8.5.2.1
Programming MSEL1
8.5.2.2
Programming MSEL2
8.5.2.3
Programming VSEL
8.5.2.4
Programming ADRSEL
8.5.2.5
Programming MSEL2 for a Loop Follower Device (GOSNS Tied to BP1V5)
8.5.2.6
Pin-Strapping Resistor Configuration
8.6
Register Maps
8.6.1
Conventions for Documenting Block Commands
8.6.2
(01h) OPERATION
8.6.3
(02h) ON_OFF_CONFIG
8.6.4
(03h) CLEAR_FAULTS
8.6.5
(04h) PHASE
8.6.6
(10h) WRITE_PROTECT
8.6.7
(15h) STORE_USER_ALL
8.6.8
(16h) RESTORE_USER_ALL
8.6.9
(19h) CAPABILITY
8.6.10
(1Bh) SMBALERT_MASK
8.6.11
(1Bh) SMBALERT_MASK_VOUT
8.6.12
(1Bh) SMBALERT_MASK_IOUT
8.6.13
(1Bh) SMBALERT_MASK_INPUT
8.6.14
(1Bh) SMBALERT_MASK_TEMPERATURE
8.6.15
(1Bh) SMBALERT_MASK_CML
8.6.16
(1Bh) SMBALERT_MASK_OTHER
8.6.17
(1Bh) SMBALERT_MASK_MFR
8.6.18
(20h) VOUT_MODE
8.6.19
(21h) VOUT_COMMAND
8.6.20
(22h) VOUT_TRIM
8.6.21
(24h) VOUT_MAX
8.6.22
(25h) VOUT_MARGIN_HIGH
8.6.23
(26h) VOUT_MARGIN_LOW
8.6.24
(27h) VOUT_TRANSITION_RATE
8.6.25
(29h) VOUT_SCALE_LOOP
8.6.26
(2Bh) VOUT_MIN
8.6.27
(33h) FREQUENCY_SWITCH
8.6.28
(35h) VIN_ON
8.6.29
(36h) VIN_OFF
8.6.30
(37h) INTERLEAVE
8.6.31
(38h) IOUT_CAL_GAIN
8.6.32
(39h) IOUT_CAL_OFFSET
8.6.33
(40h) VOUT_OV_FAULT_LIMIT
8.6.34
(41h) VOUT_OV_FAULT_RESPONSE
8.6.35
(42h) VOUT_OV_WARN_LIMIT
8.6.36
(43h) VOUT_UV_WARN_LIMIT
8.6.37
(44h) VOUT_UV_FAULT_LIMIT
8.6.38
(45h) VOUT_UV_FAULT_RESPONSE
8.6.39
(46h) IOUT_OC_FAULT_LIMIT
8.6.40
(47h) IOUT_OC_FAULT_RESPONSE
8.6.41
(4Ah) IOUT_OC_WARN_LIMIT
8.6.42
(4Fh) OT_FAULT_LIMIT
8.6.43
(50h) OT_FAULT_RESPONSE
8.6.44
(51h) OT_WARN_LIMIT
8.6.45
(55h) VIN_OV_FAULT_LIMIT
8.6.46
(56h) VIN_OV_FAULT_RESPONSE
8.6.47
(58h) VIN_UV_WARN_LIMIT
8.6.48
(60h) TON_DELAY
8.6.49
(61h) TON_RISE
8.6.50
(62h) TON_MAX_FAULT_LIMIT
8.6.51
(63h) TON_MAX_FAULT_RESPONSE
8.6.52
(64h) TOFF_DELAY
8.6.53
(65h) TOFF_FALL
8.6.54
(78h) STATUS_BYTE
8.6.55
(79h) STATUS_WORD
8.6.56
(7Ah) STATUS_VOUT
8.6.57
(7Bh) STATUS_IOUT
8.6.58
(7Ch) STATUS_INPUT
8.6.59
(7Dh) STATUS_TEMPERATURE
8.6.60
(7Eh) STATUS_CML
8.6.61
(7Fh) STATUS_OTHER
8.6.62
(80h) STATUS_MFR_SPECIFIC
8.6.63
(88h) READ_VIN
8.6.64
(8Bh) READ_VOUT
8.6.65
(8Ch) READ_IOUT
8.6.66
(8Dh) READ_TEMPERATURE_1
8.6.67
(98h) PMBUS_REVISION
8.6.68
(99h) MFR_ID
8.6.69
(9Ah) MFR_MODEL
8.6.70
(9Bh) MFR_REVISION
8.6.71
(9Eh) MFR_SERIAL
8.6.72
(ADh) IC_DEVICE_ID
8.6.73
(AEh) IC_DEVICE_REV
8.6.74
(B1h) USER_DATA_01 (COMPENSATION_CONFIG)
8.6.75
(B5h) USER_DATA_05 (POWER_STAGE_CONFIG)
8.6.76
(D0h) MFR_SPECIFIC_00 (TELEMETRY_CONFIG)
8.6.77
(DAh) MFR_SPECIFIC_10 (READ_ALL)
8.6.78
(DBh) MFR_SPECIFIC_11 (STATUS_ALL)
8.6.79
(DCh) MFR_SPECIFIC_12 (STATUS_PHASE)
8.6.80
(E3h) MFR_SPECIFIC_19 (PGOOD_CONFIG)
8.6.81
(E4h) MFR_SPECIFIC_20 (SYNC_CONFIG)
8.6.82
(ECh) MFR_SPECIFIC_28 (STACK_CONFIG)
8.6.83
(EDh) MFR_SPECIFIC_29 (MISC_OPTIONS)
8.6.84
(EEh) MFR_SPECIFIC_30 (PIN_DETECT_OVERRIDE)
8.6.85
(EFh) MFR_SPECIFIC_31 (DEVICE_ADDRESS)
8.6.86
(F0h) MFR_SPECIFIC_32 (NVM_CHECKSUM)
8.6.87
(F1h) MFR_SPECIFIC_33 (SIMULATE_FAULT)
8.6.88
(FAh) MFR_SPECIFIC_42 (PASSKEY)
8.6.89
(FBh) MFR_SPECIFIC_43 (EXT_WRITE_PROTECT)
8.6.90
(FCh) MFR_SPECIFIC_44 (FUSION_ID0)
8.6.91
(FDh) MFR_SPECIFIC_45 (FUSION_ID1)
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Custom Design With WEBENCH® Tools
9.2.2.2
Switching Frequency
9.2.2.3
Output Voltage Setting (VSEL Pin)
9.2.2.4
Compensation Selection (MSEL1 Pin)
9.2.2.5
Output Capacitor Selection
9.2.2.5.1
Output Voltage Ripple
9.2.2.6
Input Capacitor Selection
9.2.2.7
Soft Start, Overcurrent Protection, and Stacking Configuration (MSEL2 Pin)
9.2.2.8
Enable and UVLO
9.2.2.9
ADRSEL
9.2.2.10
BCX_CLK and BCX_DAT
9.2.3
Application Curves
9.2.4
Two-Phase Application
9.2.4.1
Design Requirements
9.2.4.2
Two-Phase Detailed Design Procedure
9.2.4.2.1
Switching Frequency
9.2.4.2.2
Output Voltage Setting (VSEL Pin)
9.2.4.2.3
Compensation Selection (MSEL1 Pin)
9.2.4.2.4
Output Capacitor Selection
9.2.4.2.5
Input Capacitor Selection
9.2.4.2.6
GOSNS/Loop Follower Pin of Loop Follower Devices
9.2.4.2.7
Soft Start, Overcurrent Protection, and Stacking Configuration (MSEL2 Pin)
9.2.4.2.8
Enable, UVLO
9.2.4.2.9
VSHARE Pin
9.2.4.2.9.1
ADRSEL Pin
9.2.4.2.10
SYNC Pin
9.2.4.2.11
VOSNS Pin of Loop Follower Devices
9.2.4.2.12
Unused Pins of Loop Follower Devices
9.2.4.3
Two-Phase Application Curves
9.3
Power Supply Recommendations
9.4
Layout
9.4.1
Layout Guidelines
9.4.2
Layout Example
9.4.2.1
Thermal Performance on the TI EVM
9.4.2.2
EMI
10
Device and Documentation Support
10.1
Device Support
10.1.1
サード・パーティ製品に関する免責事項
10.1.2
Development Support
10.1.2.1
Texas Instruments Fusion Digital Power Designer
10.1.2.2
Custom Design With WEBENCH® Tools
10.2
ドキュメントの更新通知を受け取る方法
10.3
サポート・リソース
10.4
Trademarks
10.5
静電気放電に関する注意事項
10.6
用語集
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
MOY|45
MPQF759
サーマルパッド・メカニカル・データ
発注情報
jajspv2_oa
1
特長
拡張セキュリティ機能を内蔵
4.25V~16V (PVIN を AVIN に接続、内部 LDO)
2.95V~16V (PVIN および AVIN 分割レール、または VDD5 に外部バイアスを印加)
MOSFET、インダクタ、基本的なパッシブ部品を内蔵
選択可能な内部補償を備えた平均電流モード制御
ピンストラップで設定可能な
0.5V~3.6V
の出力電圧範囲
0.25V~3.6V
PMBus®
VOUT_COMMAND 範囲
豊富な PMBus コマンド・セット、V
OUT
、I
OUT
、ダイ温度のテレメトリを含む
内蔵 FB 分圧器を使った差動リモート検出により、V
OUT
誤差を 1% 未満に低減
-40℃~+125℃、T
J
PMBus による AVS およびマージニング機能
マルチファンクション選択 (MSEL) ピンによる PMBus デフォルト値のピンストラップ設定
275kHz~1.1MHz で 9 つのスイッチング周波数を選択可能
周波数同期入力 / 同期出力
プリバイアス出力をサポート
16mm × 11mm × 4.3mm の 45 ピン MOY パッケージ
WEBENCH®
Power Designer
により、TPSM8S6C24 を使用するカスタム設計を作成