JAJSPV2 august 2023 TPSM8S6C24
PRODUCTION DATA
| CMD Address | 7Dh |
| Write Transaction: | Write Byte |
| Read Transaction: | Read Byte |
| Format: | Unsigned Binary (1 byte) |
| Phased: | Yes |
| NVM Back-up: | No |
| Updates: | On-the-fly |
The STATUS_TEMPERATURE command returns one data byte with contents as follows. All supported bits can be cleared either by CLEAR_FAULTS, or individually by writing 1b to the (7Dh) STATUS_TEMPERATURE register in their position, per the PMBus 1.3.1 Part II specification section 10.2.4.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RW | RW | R | R | R | R | R | R |
| OTF | OTW | 0 | 0 | 0 | 0 | 0 | 0 |
| LEGEND: R/W = Read/Write; R = Read only |
| Bit | Field | Access | Reset | Description |
|---|---|---|---|---|
| 7 | OTF | RW | 0b | 0b: Latched flag indicating OT fault has NOT occurred. 1b: Latched flag indicating OT fault has occurred. |
| 6 | OTW | RW | 0b | 0b: Latched flag indicating OT warn has NOT occurred. 1b: Latched flag indicating OT warn has occurred |
| 5:0 | Not supported | R | 0d | Not supported and always set to 000000b. |
All bits which can trigger SMBALERT have a corresponding bit in SMBALERT_MASK.