JAJSP99C June   2007  – October 2022 TRS3243

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics—Power and Status
    6. 6.6  Electrical Characteristics—Driver
    7. 6.7  Electrical Characteristics—Receiver
    8. 6.8  Switching Characteristics—Power and Status
    9. 6.9  Switching Characteristics—Driver
    10. 6.10 Switching Characteristics—Receiver
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Automatic Power Down
      2. 8.3.2 Charge Pump
      3. 8.3.3 RS232 Driver
      4. 8.3.4 RS232 Receiver
      5. 8.3.5 ROUT2B Receiver
      6. 8.3.6 Invalid Input Detection
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  10. 10Device and Documentation Support
    1. 10.1 サポート・リソース
    2. 10.2 Trademarks
    3. 10.3 静電気放電に関する注意事項
    4. 10.4 用語集
  11. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

6.10 Switching Characteristics—Receiver

over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)(1)
PARAMETERTEST CONDITIONSTYP(2)UNIT
tPLHPropagation delay time, low- to high-level outputCL = 150 pF,
See Figure 7-3		150ns
tPHLPropagation delay time, high- to low-level output150ns
tenOutput enable timeCL = 150 pF, RL = 3 kΩ,
See Figure 7-4		200ns
tdisOutput disable time200ns
tsk(p)Pulse skew(3)See Figure 7-350ns
(1) Test conditions are C1–C4 = 0.1 μF at VCC = 3.3 V ± 0.3 V; C1 = 0.047 μF, C2–C4 = 0.33 μF at VCC = 5 V ± 0.5 V.
(2) All typical values are at VCC = 3.3 V or VCC = 5 V, and TA = 25°C.
(3) Pulse skew is defined as |tPLH - tPHL| of each channel of the same device.