SCDS247B October   2008  – February 2016 TS12A44513 , TS12A44514 , TS12A44515

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics for 5-V Supply
    6. 6.6 Electrical Characteristics for 12-V Supply
    7. 6.7 Electrical Characteristics for 3-V Supply
    8. 6.8 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Logic-Level Thresholds
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ(パッケージ|ピン)
サーマルパッド・メカニカル・データ
発注情報

9 Power Supply Recommendations

The TS12A4451x construction is typical of most CMOS analog switches, except that they have only two supply pins: VCC and GND. VCC and GND drive the internal CMOS switches and set their analog voltage limits. Reverse ESD-protection diodes connected in series are internally connected between each analog-signal pin and both VCC and GND. If an analog signal exceeds VCC or GND, one of the diodes will be forward biased, but the other will be reverse biased preventing current flow.

Virtually all the analog leakage current comes from the ESD diodes to VCC or GND. Although the ESD diodes on a given signal pin are identical and, therefore, fairly well balanced, they are reverse biased differently. Each is biased by either VCC or GND and the analog signal. This means their leakages will vary as the signal varies. The difference in the two diode leakages to the VCC and GND pins constitutes the analog-signal-path leakage current. All analog leakage current flows between each pin and one of the supply terminals, not to the other switch terminal. This is why both sides of a given switch can show leakage currents of the same or opposite polarity.

There is no direct connection between the analog-signal paths and VCC or GND.

VCC and GND also power the internal logic and logic-level translators. The logic-level translators convert the logic levels to switched VCC and GND signals to drive the analog signal gates.