JAJSFX9B OCTOBER   2004  – August 2018 TS5A3357

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      ロジック図
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics for 5-V Supply
    6. 7.6 Electrical Characteristics for 3.3-V Supply
    7. 7.7 Electrical Characteristics for 2.5-V Supply
    8. 7.8 Electrical Characteristics for 1.8-V Supply
    9. 7.9 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13デバイスおよびドキュメントのサポート
    1. 13.1 デバイス・サポート
    2. 13.2 ドキュメントのサポート
    3. 13.3 ドキュメントの更新通知を受け取る方法
    4. 13.4 コミュニティ・リソース
    5. 13.5 商標
    6. 13.6 静電気放電に関する注意事項
    7. 13.7 Glossary
  14. 14メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.5 Electrical Characteristics for 5-V Supply(1)

V+ = 4.5 V to 5.5 V, TA = –40°C to 85°C (unless otherwise noted)
PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT
Analog Switch
Peak ON resistance rpeak 0 ≤ VNO ≤ V+,
ICOM = –30 mA,		 Switch ON,
See Figure 13 		Full 4.5 V 15 Ω
ON-state resistance ron VNO = 0,
ICOM = 30 mA		 Switch ON,
See Figure 13 		25°C 4.5 V 5 7 Ω
Full 7
VNO = 2.4 V,
ICOM = –30 mA		 25°C 6 12
Full 12
VNO = 4.5 V,
ICOM = –30 mA		 25°C 7 15
Full 15
ON-state resistance
match between channels		 Δron VNO = 3.15 V,
ICOM = –30 mA,		 Switch ON,
See Figure 13 		25°C 4.5 V 0.1 Ω
ON-state
resistance flatness		 ron(flat) 0 ≤ VNO ≤ V+,
ICOM = –30 mA,		 Switch ON,
See Figure 13 		25°C 5 V 6.5 Ω
NO
OFF leakage current		 INO(OFF) VNO = 0 to V+,
VCOM = V+ to 0 		Switch OFF,
See Figure 14 		25°C 5.5 V –0.1 0.1 μA
Full –1 1
COM
OFF leakage current		 ICOM(OFF) VCOM = 0 to V+,
VNO = V+ to 0,		 Switch OFF,
See Figure 14 		25°C 0 –0.1 0.1 μA
Full –1 1
NO
ON leakage current		 INO(ON) VNO = 0 to V+,
VCOM = Open,		 Switch ON,
See Figure 14 		25°C 5.5 V –0.1 0.1 μA
Full –1 1
COM
ON leakage current		 ICOM(ON) VNO = Open,
VCOM = 0 to V+,		 Switch ON,
See Figure 14 		25°C 5.5 V –0.1 0.1 μA
Full –1 1
Digital Control Inputs (IN1, IN2)(2)
Input logic high VIH Full V+ × 0.7 5.5 V
Input logic low VIL Full 0 V+ × 0.3 V
Input leakage
current		 IIH, IIL VI = 5.5 V or 0 25°C 5.5 V 0.1 μA
Full 1
Dynamic
Turn-on time tON VNO = V+ or GND,
RL = 500 Ω,		 CL = 50 pF,
See Figure 16 		25°C 5 V 1.5 6.5 ns
Full 4.5 V to 5.5 V 1.5 7
Turn-off time tOFF VNO = V+ or GND,
RL = 500 Ω,		 CL = 50 pF,
See Figure 16 		25°C 5 V 0.8 3.7 ns
Full 4.5 V to 5.5 V 0.8 7
Break-before-
make time		 tBBM VNO = V+,
RL = 50 Ω,		 CL = 50 pF,
See Figure 17 		25°C 5 V 0.5 ns
Full 4.5 V to 5.5 V 0.5
Charge
injection		 QC VGEN = 0,
CL = 0.1 nF,		 See Figure 21 25°C 5 V 3.4 pC
NO
OFF capacitance		 CNO(OFF) VNO = V+ or GND,
Switch OFF,		 See Figure 15 25°C 5 V 4.5 pF
COM
OFF capacitance		 CCOM(OFF) VNO = V+ or GND,
Switch OFF,		 See Figure 15 25°C 5 V 10.5 pF
NO
ON capacitance		 CNO(ON) VNO = V+ or GND,
Switch ON,		 See Figure 15 25°C 5 V 17 pF
COM
ON capacitance		 CCOM(ON) VCOM = V+ or GND,
Switch ON,		 See Figure 15 25°C 5 V 17 pF
Digital input
capacitance		 CI VI = V+ or GND, See Figure 15 25°C 5 V 3 pF
Bandwidth BW RL = 50 Ω,
Switch ON,		 See Figure 18 25°C 4.5 V to 5.5 V 334 MHz
OFF isolation OISO RL = 50 Ω,
f = 10 MHz,		 Switch OFF,
See Figure 19 		25°C 4.5 V to 5.5 V –82 dB
Crosstalk XTALK RL = 50 Ω,
f = 10 MHz,		 Switch ON,
See Figure 20 		25°C 4.5 V to 5.5 V –62 dB
Supply
Positive supply
current		 I+ VI = V+ or GND, Switch ON or OFF 25°C 5.5 V 1 μA
Full 10
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum
(2) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.