JAJSC71E
May 2016 – May 2019
TUSB1002
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics, Power Supply
6.6
Electrical Characteristics
6.7
Power-Up Requirements
6.8
Timing Requirements
6.9
Switching Characteristics
6.10
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
4-Level Control Inputs
7.3.2
Linear Equalization
7.3.3
Adjustable VOD Linear Range and DC Gain
7.3.4
Receiver Detect Control
7.3.5
USB3.1 Dual Channel Operation (MODE = “F”)
7.3.6
USB3.1 Single Channel Operation (MODE = “1”)
7.3.7
PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
7.4
Device Functional Modes
7.4.1
Shutdown Mode
7.4.2
Disconnect Mode
7.5
U0 Mode
7.6
U1 Mode
7.7
U2/U3 Mode
8
Application and Implementation
8.1
Application Information
8.2
Typical USB3.1 Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
8.3
Typical SATA, PCIe and SATA Express Application
8.3.1
Design Requirements
8.3.2
Detailed Design Procedure
8.3.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
コミュニティ・リソース
11.2
商標
11.3
静電気放電に関する注意事項
11.4
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
RGE|24
MPQF124G
サーマルパッド・メカニカル・データ
RGE|24
QFND136Y
発注情報
jajsc71e_oa
jajsc71e_pm
7
Detailed Description