JAJSKH5A April 2022 – May 2024 TUSB1142
PRODUCTION DATA
It may be necessary to incorporate an ESD component to protect the TUSB1142 from electrostatic discharge (ESD). TI recommends following the ESD protection recommendations listed in Table 7-2. A clamp voltage greater than value specified in Table 7-2 may require a RESD on each differential pin. Place the ESD component near the USB connector.
Parameter | Recommendation |
---|---|
Breakdown voltage | ≥ 3.5 V |
I/O line capacitance | Data rates ≤ 5 Gbps: ≤ 0.50 pF |
Data rates > 5 Gbps: ≤ 0.35 pF | |
Delta capacitance between any P and N I/O pins | ≤ 0.07 pF |
Clamping voltage at 8A IPP IO to GND (1) | ≤ 4.5 V |
Typical dynamic resistance | ≤ 30 mΩ |
Manufacturer | Part Number | RESD to support IEC 61000-4-2 Contact ±8 kV |
---|---|---|
Nexperia | PUSB3FR4 | 1 Ω |
Nexperia | PESD2V8Y1BSF | 1 Ω |
Texas Instruments | TPD1E04U04DPLR | 2 Ω |
Texas Instruments | TPD4E02B04DQAR | 2 Ω |