JAJSRL5B February 2019 – October 2023 TUSB2E22
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
DIGITAL INPUTS | ||||||
VIH | High level input voltage | CROSS, EQ1, EQ0 | 1.053 | V | ||
VIL | Low-level input voltage | CROSS, EQ1, EQ0 | 0.693 | V | ||
VIL | Low-level input voltage | RESETB | 0.35 | V | ||
VIH | High level input voltage | RESETB | 0.75 | V | ||
IIH | High level input current | VIH = 1.98 V,
VDD3V3=3.0 V or 0 V, VDD1V8=1.62V or 0 V CROSS, RESETB, EQ1, EQ0 | 2 | µA | ||
IIL | Low level input current | VIL = 0 V,
VDD3V3=3.0 V or 0 V, VDD1V8=1.62V or 0 V CROSS, RESETB, EQ1, EQ0 | 2 | µA | ||
USBA (DPA, DNA), USBB (DPB, DNB) | ||||||
Zinp_Dx | Impedance to GND, no pull up/down | Vin=3.6 V, VDD3V3=3.0 V USB 2.0 Specification Section 7.1.6 | 390 | kΩ | ||
RPUI | Bus Pull-up Resistor on Upstream Facing Port (idle) | USB 2.0 Specification Section 7.1.5 | 0.92 | 1.1 | 1.475 | kΩ |
RPUR | Bus Pull-up Resistor on Upstream Facing Port (receiving) | USB 2.0 Specification Section 7.1.5 | 1.525 | 2.2 | 2.99 | kΩ |
RPD | Bus Pull-down Resistor on Downstream Facing Port | USB 2.0 Specification Section 7.1.5 | 14.35 | 19 | 24.6 | kΩ |
VHSTERM | Termination voltage in highspeed | USB 2.0 Specification Section 7.1.6.2, The output voltage in the high-speed idle state | –10 | 10 | mV | |
USB TERMINATION | ||||||
ZHSTERM | Driver Output Resistance (which also serves as high speed termination) | (VOH= 0 to 600 mV) USB 2.0 Specification Section 7.1.1.1, | 40.5 | 45 | 49.5 | Ω |
USBA, USBB INPUT LEVELS LS/FS | ||||||
VIH | High (driven) | USB 2.0 Specification Section 7.1.4 (measured at connector) | 2 | V | ||
VIHZ | High (floating) | USB 2.0 Specification Section 7.1.4 (HOST downstream port pull down resistor enabled and external device pull up 1.5K +/-5% to 3.0-3.6 V). | 2.7 | 3.6 | V | |
VIL | Low | USB 2.0 Specification Section 7.1.4 | 0.8 | V | ||
USBA, USBB OUTPUT LEVELS LS/FS | ||||||
VOL | Low | USB 2.0 Specification Section 7.1.1, (measured at connector with RL of 1.425 kΩ to 3.6 V. ) | 0 | 0.3 | V | |
VOH | High (Driven) | USB 2.0 Specification Section 7.1.1 (measured at connector with RL of 14.25 kΩ to GND. ) | 2.8 | 3.6 | V | |
ZFSTERM | Driver Series Output Resistance | USB 2.0 Specification Section 7.1.1, Measured it during VOL or VOH | 28 | 44 | Ω | |
VCRS | Output Signal Crossover Voltage | Measured as in USB 2.0 Specification Section 7.1.1 Figure 7-8; Excluding the first transition from the Idle state | 1.3 | 2 | V | |
USBA, USBB OUTPUT LEVELS HS | ||||||
VHSOH | High-speed data signaling high | USB 2.0 Specification Section 7.1.7.2, measured single ended peak voltage per USB 2.0 test measurement spec, Test load is an ideal 45 Ω to GND on DP and DN | 360 | 440 | mV | |
VHSOL | High-speed data signaling low, driver is off termination is on (measured single ended) | USB 2.0 Specification Section 7.1.7.2, Test load is an ideal 45 Ω to GND on DP and DN. | –10 | 10 | mV | |
VCHIRPJ | Chirp J level (differential voltage) | USB 2.0 Specification Section 7.1.7.2 , Test load is an ideal 45 Ω to GND on DP and DN. | 700 | 900 | 1100 | mV |
VCHIRPK | Chirp K level (differential voltage) | USB 2.0 Specification Section 7.1.7.2 , Test load is an ideal 45 Ω to GND on DP and DN. | -900 | -700 | -500 | mV |
U2_TXCM | High-speed TX DC Common Mode | -50 | 200 | 500 | mV | |
eUSB2 TERMINATION | ||||||
RSRC_HS | High speed transmit source termination impedance | eUSB2 Specification Section 7.1.1 | 33 | 40 | 47 | Ω |
ΔRSRC_HS | High speed source impedance mismatch | eUSB2 Specification Section 7.1.1 | 4 | Ω | ||
RRCV_DIF | High speed differential receiver termination (repeater) | eUSB2 Specification Section 7.1.2 | 74 | 80 | 86 | Ω |
RPD | Pull-down resistors on eDP/eDN | eUSB2 Specification Section 7.3, active during LS, FS and HS | 6 | 8 | 10 | kΩ |
RSRC_LSFS | Transmit output impedance | eUSB2 Specification Section 7.2.1, Table 7-13 TX output impedance to match spec version 1.10 | 28 | 44 | 59 | Ω |
eUSB0, eUSB1 FS/LS INPUT LEVELS | ||||||
VIL | Single-ended input low | eUSB2 Specification Section 7.2.1, Table 7-13 | –0.1 | 0.399 | V | |
VIH | Single-ended input high | eUSB2 Specification Section 7.2.1, Table 7-13 | 0.819 | 1.386 | V | |
VHYS | Receive single-ended hysteresis voltage | eUSB2 Specification Section 7.2.1, Table 7-13 | 43.2 | mV | ||
eUSB0, eUSB1 FS/LS OUTPUT LEVELS | ||||||
VOL | Single-ended output low | eUSB2 Specification Section 7.2.1, Table 7-13 | 0.198 | V | ||
VOH | Single-ended output high | eUSB2 Specification Section 7.2.1, Table 7-13 | 0.918 | 1.32 | V | |
eUSB0, eUSB1 HS INPUT LEVELS | ||||||
VRX_CM | Receive DC common mode range (low) | eUSB2 Specification Section 7.1.2 (normative), low DC common mode RX must tolerate | 120 | mV | ||
VRX_CM | Receive DC common mode range (high) | eUSB2 Specification Section 7.1.2 (normative), high DC common mode RX must tolerate | 280 | mV | ||
VCM_RX_AC | Receiver AC common mode (50MHz-480MHz) | eUSB2 Specification Section 7.1.2 (informative), across the DC common mode range of 120 mV to 280 mV. (RX capability tested with intentional TX Rise/Fall Time mismatch and prop delay mismatch) | –60 | 60 | mV | |
CRX_CM | Receive center-tapped capacitance | eUSB2 Specification Section 7.1.2 (informative) | 15 | 50 | pF | |
VRX_DIF_SENS | Receive differential sensitivity, RX should be able to receive less than this value. | eUSB2 Specification Section 7.1.2, VCM = 120 mV to 450 mV | 120 | mVp-p | ||
eUSB0, eUSB1 HS OUTPUT LEVELS | ||||||
VETX_CM_AC | Transmit CM AC (50MHz-480MHz) | eUSB2 Specification Section 7.1.1, An ideal 80 Ω Rx differential termination and center tap cap of 15pF, with maximum DC common mode range | –30 | 30 | mV | |
VEHSOD | Transmit differential (terminated) | Measured p2p, RL = 80 Ω, ideal 80 Ω Rx differential termination load | 400 | mV | ||
VE_TX_CM | Transmit DC common mode | eUSB2 Specification Section 7.1.1 | 170 | 230 | mV |