JAJSRL5C February 2019 – August 2024 TUSB2E22
PRODUCTION DATA
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RESETB pin is active low reset pin and can also be used as a power down pin.
TUSB2E22 does not have power supply sequence requirements between VDD3V3 and VDD1V8.
Maximum VDD3V3 and VDD1V8 ramp time to reach minimum supply voltages should be 2 ms.
Internal power on reset circuit along with the external RESETB input pin allows for proper initialization when RESETB is deasserted high prior to the power rails being valid. If RESETB deassert high before the power supplies are stable, internal power on reset circuit will hold off internal reset until the supplies are stable.
Upon deassertion of RESETB followed by internally generated reset signal and 1ms delay, CROSS pin is sampled and latched.
Upon deassertion of RESETB and after t_RH_READY, TUSB2E22 will enable and enter default state and be ready to accept eUSB2 packets. Each repeater will either be in host repeater mode or device repeater mode depending on the receipt of either host mode enable or peripheral mode enable.