JAJSN61F May   2015  – March 2022 TUSB320

PRODUCTION DATA  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
      1. 7.2.1 Cables, Adapters, and Direct Connect Devices
        1. 7.2.1.1 USB Type-C Receptacles and Plugs
        2. 7.2.1.2 USB Type-C Cables
        3. 7.2.1.3 Legacy Cables and Adapters
        4. 7.2.1.4 Direct Connect Devices
        5. 7.2.1.5 Audio Adapters
    3. 7.3 Feature Description
      1. 7.3.1 Port Role Configuration
        1. 7.3.1.1 Downstream Facing Port (DFP) – Source
        2. 7.3.1.2 Upstream Facing Port (UFP) – Sink
        3. 7.3.1.3 Dual Role Port (DRP)
      2. 7.3.2 Type-C Current Mode
      3. 7.3.3 Accessory Support
        1. 7.3.3.1 Audio Accessory
        2. 7.3.3.2 Debug Accessory
      4. 7.3.4 I2C and GPIO Control
      5. 7.3.5 VBUS Detection
    4. 7.4 Device Functional Modes
      1. 7.4.1 Unattached Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Dead Battery Mode
      4. 7.4.4 Shutdown Mode
    5. 7.5 Programming
    6. 7.6 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRP in I2C Mode
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DFP in I2C Mode
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 UFP in I2C Mode
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Initialization Set Up
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 サポート・リソース
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

8.3 Initialization Set Up

The general power-up sequence for the TUSB320 device (EN_N tied to ground) is as follows:

  1. System is powered off (device has no VDD). The TUSB320 device is configured internally in UFP mode with Rds on CC pins (dead battery).
  2. VDD ramps – POR circuit. VDD must ramp within 25 ms or less. IO pull-up power rail (for example, pull up on ID, INT, SCL, SDA, ADDR, and PORT) must ramp with VDD or lag after VDD.
  3. I2C supply ramps up.
  4. The TUSB320 device enters unattached mode and determines the voltage level from the PORT pin. This determines the mode in which the TUSB320 device operates (DFP, UFP, and DRP).
  5. The TUSB320 device monitors the CC pins as a DFP and VBUS for attach as an UFP.
  6. The TUSB320 device enters active mode when attach has been successfully detected.