7.5.2 The Following Procedure Should be Followed to Read the TUSB544 I2C Registers:
The master initiates a read operation by generating a start condition (S), followed by the TUSB544 7-bit address and a one-value “W/R” bit to indicate a read cycle
The TUSB544 acknowledges the address cycle.
The TUSB544 transmit the contents of the memory registers MSB-first starting at register 00h or last read sub-address+1. If a write to the TUSB544 I2C register occurred prior to the read, then the TUSB544 shall start at the sub-address specified in the write.
The TUSB544 shall wait for either an acknowledge (ACK) or a not-acknowledge (NACK) from the master after each byte transfer; the I2C master acknowledges reception of each data byte transfer.
If an ACK is received, the TUSB544 transmits the next byte of data.
The master terminates the read operation by generating a stop condition (P).