JAJSD41E April   2017  – April 2018 TUSB544

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
    1.     Device Images
      1.      概略回路図
  4. 4 改訂履歴
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Characteristics
    6. 6.6  DC Electrical Characteristics
    7. 6.7  AC Electrical Characteristics
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.1
      2. 7.3.2 DisplayPort
      3. 7.3.3 4-Level Inputs
      4. 7.3.4 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Configuration in GPIO Mode
      2. 7.4.2 Device Configuration in I2C Mode
      3. 7.4.3 DisplayPort Mode
      4. 7.4.4 Custom Alternate Mode
      5. 7.4.5 Linear EQ Configuration
      6. 7.4.6 Adjustable VOD Linear Range and DC Gain
      7. 7.4.7 USB3.1 modes
      8. 7.4.8 Operation Timing – Power Up
    5. 7.5 Programming
      1. 7.5.1 The Following Procedure Should be Followed to Write to TUSB544 I2C Registers:
      2. 7.5.2 The Following Procedure Should be Followed to Read the TUSB544 I2C Registers:
      3. 7.5.3 The Following Procedure Should be Followed for Setting a Starting Sub-Address for I2C Reads:
    6. 7.6 Register Maps
      1. 7.6.1 TUSB544 Registers
        1. 7.6.1.1  GENERAL_4 Register (Offset = Ah) [reset = 1h]
          1. Table 13. GENERAL_4 Register Field Descriptions
        2. 7.6.1.2  GENERAL_5 Register (Offset = Bh) [reset = 0h]
          1. Table 14. GENERAL_5 Register Field Descriptions
        3. 7.6.1.3  GENERAL_6 Register (Offset = Ch) [reset = 0h]
          1. Table 15. GENERAL_6 Register Field Descriptions
        4. 7.6.1.4  DISPLAYPORT_1 Register (Offset = 10h) [reset = 0h]
          1. Table 16. DISPLAYPORT Register Field Descriptions
        5. 7.6.1.5  DISPLAYPORT_2 Register (Offset = 11h) [reset = 0h]
          1. Table 17. DISPLAYPORT_2 Register Field Descriptions
        6. 7.6.1.6  DISPLAYPORT_3 Register (Offset = 12h) [reset = 0h]
          1. Table 18. DISPLAYPORT_3 Register Field Descriptions
        7. 7.6.1.7  DISPLAYPORT_4 Register (Offset = 13h) [reset = 0h]
          1. Table 19. DISPLAYPORT_4 Register Field Descriptions
        8. 7.6.1.8  DISPLAYPORT_5 Register (Offset = 1Bh) [reset = 0h]
          1. Table 20. DISPLAYPORT_5 Register Field Descriptions
        9. 7.6.1.9  USB3.1_1 Register (Offset = 20h) [reset = 0h]
          1. Table 21. USB3.1 Register Field Descriptions
        10. 7.6.1.10 USB3.1_2 Register (Offset = 21h) [reset = 0h]
          1. Table 22. USB3.1_2 Register Field Descriptions
        11. 7.6.1.11 USB3.1_3 Register (Offset = 22h) [reset = 0h]
          1. Table 23. USB3.1_3 Register Field Descriptions
        12. 7.6.1.12 USB3.1_4 Register (Offset = 23h) [reset = 23h]
          1. Table 24. USB3.1_4 Register Field Descriptions
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 USB 3.1 only (USB/DP Alternate Mode)
      2. 8.3.2 USB3.1 and 2 lanes of DisplayPort
      3. 8.3.3 DisplayPort Only
      4. 8.3.4 USB 3.1 only (USB/Custom Alternate Mode)
      5. 8.3.5 USB3.1 and 1 Lane of Custom Alt Mode
      6. 8.3.6 USB3.1 and 2 Lane of Custom Alt Mode
      7. 8.3.7 USB3.1 and 4 Lane of Custom Alt Mode
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 ドキュメントのサポート
      1. 11.1.1 関連資料
    2. 11.2 ドキュメントの更新通知を受け取る方法
    3. 11.3 コミュニティ・リソース
    4. 11.4 商標
    5. 11.5 静電気放電に関する注意事項
    6. 11.6 Glossary
  12. 12メカニカル、パッケージ、および注文情報

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

4 改訂履歴

Changes from D Revision (November 2017) to E Revision

  • 「概略回路図」を変更Go

Changes from C Revision (October 2017) to D Revision

  • 「概要」の2番目の段落のテキストを「……シンボル間干渉(IS)によるケーブルおよび基板配線での損失」から「……ケーブルおよびボード配線での損失によるシンボル間干渉(ISI)」に変更Go
  • Changed Pin 2 and Pin 35 text From: "When I2C_EN !=0,.." To: "In I2C mode,.." in the Pin FunctionsGo
  • Changed Pin 14 text From: "..levels for the GPIO configuration.." To: "..levels for the 2-level GPIO configuration.." in the Pin FunctionsGo
  • Changed Pin 17 in the text From: 0 = GPIO Mode (I2C disabled) To: 0 = GPIO Mode AUX Snoop enabled (I2C disabled) in the Pin FunctionsGo
  • Changed Pins 21, 22, and 23 From: "When I2C_EN !=0,.." To: "In GPIO mode,.." in the Pin FunctionsGo
  • Removed "When I2C_EN = 0" from pin 32. Go
  • In pin 32, changed 2ms to tCTL1_DEBOUNCEGo
  • From: DEQ1 sets the high-frequency equalizer gain for downstream facing URX1, URX2, UTX1, UTX2 receivers. To: DEQ1 sets the high-frequency equalizer gain for downstream facing DRX1, DRX2, DTX1, DTX2 receivers Go
  • Deleted the MAX value of 10 ms from tCTL1_DEBOUNCE in the Switching CharacteristicsGo
  • Added test Condition " DP lanes will be disabled if low for greater than min value" for tCTL1_DEBOUNCE in the Switching CharacteristicsGo
  • Changed text From: "There is an internal 30 kΩ pull-up and a 94kΩ pull-down." To: "There are internal pull-up and a pull-down resisters." in 4-Level InputsGo
  • Changed text From: "..when I2C_EN = “0”." To: "..when I2C_EN = “0” or "F"." in the first paragraph of Device Configuration in GPIO ModeGo
  • Changed Table 4Go
  • Changed text From: "..when I2C_EN is not equal to “0”." To: "..when I2C_EN is equal to “1”. " in Device Configuration in I2C ModeGo
  • Changed text From: "When I2C_EN is ‘0’,.." To: :In I2C mode,.." in DisplayPort ModeGo
  • Changed text From: "When I2C_EN is ‘0’,.." To: :In GPIO mode,.." in Custom Alternate ModeGo
  • Deleted the Cable Mode section and all "cable mode" from datasheet. Go
  • Changed Table 12Go
  • Changed Bit 5-2 Type From: R/WU To: R/W in Table 15Go
  • Changed Bit 7-0 Type From: R/WU To: R/W in Figure 25 and Table 16Go
  • Changed Bit 7-0 Type From: R/WU To: R/W in Figure 26 and Table 17Go
  • Changed Bit 6-0 Type From: RU To: RH in Figure 27 and Table 18Go
  • Changed Figure 29 and Table 20Go
  • Changed Bit 7-0 Type From: R/WU To: R/W in Figure 30 and Table 21Go
  • Changed Bit 3-0 Type From: R/WU To: R/W in Figure 31 and Table 22Go
  • Changed bit 7 From: R/WU To: RH in Figure 32 and Table 23Go
  • USB3.1_# register default changed to 4h from 0h.Go
  • Changed USB3.1_4 register default to 23h from 00h. Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 40Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 41Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 42Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 48Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 49Go
  • Changed SBU1, and SBU2 pin labels on the Sink side of Figure 50Go

Changes from B Revision (Mayl 2017) to C Revision

  • Changed Tcfg_su From: 350 ms To: 350 µs in Table 9Go

Changes from A Revision (April 2017) to B Revision

  • Added a MIN value of 0.5 pF to CI_I2C in the DC Electrical Characteristics tableGo
  • Changed VRX-DC-CM, deleted the MIN and MAX values and added TYP = 0 V in the AC Electrical Characteristics tableGo
  • Changed EQSS Description From: "Receiver equalization" To: "Receiver equalization at maximum setting" in the AC Electrical Characteristics tableGo
  • Changed EQSS From: MAX = 9.8 dB To: MAX = 9 dB in the AC Electrical Characteristics tableGo
  • Changed VTX-DC-CM, deleted the MIN and MAX values and added TYP = 1.75 V in the AC Electrical Characteristics tableGo
  • Changed RLTX-DIFF From: TYP = -14 dB To: TYP = -13 dB in the AC Electrical Characteristics tableGo
  • Changed RLTX-CM From: TYP = -13 dB To: TYP = -11 dB in the AC Electrical Characteristics tableGo
  • Changed GLF From: MAX = 2.5 dB To: MAX = 1 dB in the AC Electrical Characteristics tableGo
  • Changed VIC, deleted the MIN and MAX values and added TYP = 0 V in the AC Electrical Characteristics tableGo
  • Changed the EQDP entry in the AC Electrical Characteristics tableGo
  • Changed VTX(DC-CM), deleted the MIN and MAX values and added TYP = 1.75 V in the AC Electrical Characteristics tableGo
  • Changed the tIDLEExit_DISC value From: TYP = 10 µs To TYP = 15 ms in the Timing Requirements tableGo
  • Changed the tCTL1_DEBOUNCE value From: MIN = 2 ms To: MIN = 3 ms in the Switching Characteristics table Go

Changes from * Revision (April 2017) to A Revision

  • Changed SBU1, SBU2, AUXn, and AUXp pin labels on the Sink side of Figure 45Go
  • Changed SBU1, SBU2, AUXn, and AUXp pin labels on the Sink side of Figure 46Go