JAJSOK5Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
The Device Control Register controls PCI Express device specific parameters.
PCI register offset: 78h
Register type: Read/Write
Default value: 2810h
Bit No. | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
15 | INITIATE_FLR | rw | Initiate Function Level Reset. A write of 1b initiates Function Level Reset to the Function. The value read by software from this bit is always 0b. |
14:12 | MRRS | rw | Max Read Request Size. This field is programmed by host software to set the maximum size of a read request that the TUSB73X0 can generate. This field is encoded as: 000 – 128B 001 – 256B 010 – 512B (default) 011 – 1024B 100 – 2048B101 – 4096B 110 – Reserved 111 – Reserved |
11 | ENS | rw | Enable No Snoop. Controls the setting of the No Snoop
flag within the TLP header for upstream memory transactions mapped
to any traffic class mapped to a virtual channel other than VC0
through the Upstream Decode Windows. 0 – No snoop field is 0 1 – No snoop field is 1 (default) |
10 | APPE | rw | Auxiliary Power PM Enable. This bit is only reset by a Global Reset. |
9 | PFE | r | Phantom Function Enable. Because the TUSB73X0 does not support phantom functions this bit is read only zero. |
8 | ETFE | rw | Extended Tag Field Enable. |
7:5 | MPS | rw | Max Payload Size. |
4 | ERO | rw | Enable Relaxed Ordering. |
3 | URRE | rw | Unsupported Request Reporting Enable. |
2 | FERE | rw | Fatal Error Reporting Enable. |
1 | NFERE | rw | Non-Fatal Error Reporting Enable. |
0 | CERE | rw | Correctable Error Reporting Enable. |