JAJSOK5Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
The TUSB73X0 implements 8 Interrupter Moderation Registers, one for each Interrupter implemented.
Runtime Base register offset: 24h + (20h × Interrupter), where Interrupter = 0 through 7
Register type: Read/Write
Default value: 0000 0FA0h
Bit No. | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reset State | X | X | X | X | X | X | X | X | X | X | X | X | X | X | X | X |
Bit No. | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
31:16 | IMODC | rw | Interrupt Moderation Counter. |
15:0 | IMODI | rw | Interrupt Moderation Interval. |