JAJSOK5Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
This register is a read/write register is used to control various functions of the TUSB73X0. This register is reset by a PCI Express reset (PERST#), a GRST#, or the internally-generated power-on-reset.
PCI register offset: D8h
Register type: Read-Only, Read/Write
Default value: 0000 001Bh
Bit No. | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit No. | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 1 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
31:6 | RSVD | r | Reserved. Returns zeros when read. |
5:3 | L1ASPM_ENTRY_TIMER(1) | rw | L1ASPM Entry Timer. This field specifies the value of the L1ASPM Entry Timer. This field defaults to 011, corresponding to a value of 8 µs. |
2:0 | L0s_ENTRY_TIMER(1) | rw | L0s Entry timer. This field specifies the value of the L0s Entry timer. This field defaults to 011, corresponding to a value of 4 µs. |