JAJSOK5Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
This register indicates into which BAR and offset the MSI-X table is mapped.
PCI register offset: C4h
Register type: Read-Only
Default value: 0000 0002h
Bit No. | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit No. | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
31:3 | TABLE_OFFSET | r | Table Offset. This field is set to 000h to indicate that the MSI-X Table is at an offset of 0000h from the beginning of the BAR at offset 18h. |
2:0 | TABLE_BIR | r | Table BIR. This field is set to 010b to indicate that the MSI-X table is mapped into the BAR at offset 18h. |