JAJSMI4A February   2022  – May 2024 TXU0101

PRODMIX  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions—TXU0101
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.2 ± 0.1V
    7. 5.7  Switching Characteristics, VCCA = 1.5 ± 0.1V
    8. 5.8  Switching Characteristics, VCCA = 1.8 ± 0.15V
    9. 5.9  Switching Characteristics, VCCA = 2.5 ± 0.2V
    10. 5.10 Switching Characteristics, VCCA = 3.3 ± 0.3V
    11. 5.11 Switching Characteristics, VCCA = 5.0 ± 0.5V
    12. 5.12 Operating Characteristics
    13. 5.13 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
        1. 7.3.1.1 Inputs with Integrated Static Pull-Down Resistors
      2. 7.3.2 Control Logic (OE) with VCC(MIN) Circuitry
      3. 7.3.3 Balanced High-Drive CMOS Push-Pull Outputs
      4. 7.3.4 VCC Isolation and VCC Disconnect
      5. 7.3.5 Over-Voltage Tolerant Inputs
      6. 7.3.6 Glitch-Free Power Supply Sequencing
      7. 7.3.7 Negative Clamping Diodes
      8. 7.3.8 Fully Configurable Dual-Rail Design
      9. 7.3.9 Supports High-Speed Translation
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Regulatory Requirements
    2. 9.2 Documentation Support
      1. 9.2.1 Related Documentation
    3. 9.3 ドキュメントの更新通知を受け取る方法
    4. 9.4 サポート・リソース
    5. 9.5 Trademarks
    6. 9.6 静電気放電に関する注意事項
    7. 9.7 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • DBV|6
  • DTQ|6
  • DCK|6
  • DRY|6
サーマルパッド・メカニカル・データ
発注情報

5.12 Operating Characteristics

TA = 25℃ (1)
PARAMETERTest ConditionsSupply Voltage (VCCB = VCCA)UNIT
1.2 ± 0.1V1.5 ± 0.1V1.8 ± 0.15V2.5 ± 0.2V3.3 ± 0.3V5.0 ± 0.5V
TYPTYPTYPTYPTYPTYP
CpdA (2)A to B: outputs enabledA Port
CL = 0, RL = Open
f = 10MHz
trise = tfall = 1 ns		222223pF
A to B: outputs disabled222223
B to A: outputs enabled121212131316
B to A: outputs disabled222223
CpdB (3)A to B: outputs enabledB Port
CL = 0, RL = Open
f = 10MHz
trise = tfall = 1 ns		121212131316pF
A to B: outputs disabled222223
B to A: outputs enabled222223
B to A: outputs disabled222223
(1) See the CMOS Power Consumption and Cpd Calculation application report for additional information about how power dissipation capacitance affects power consumption.
(2) A-Port power dissipation capacitance per transceiver.
(3) B-Port power dissipation capacitance per transceiver.