JAJSMI4A
February 2022 – May 2024
TXU0101
PRODMIX
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions—TXU0101
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics, VCCA = 1.2 ± 0.1V
5.7
Switching Characteristics, VCCA = 1.5 ± 0.1V
5.8
Switching Characteristics, VCCA = 1.8 ± 0.15V
5.9
Switching Characteristics, VCCA = 2.5 ± 0.2V
5.10
Switching Characteristics, VCCA = 3.3 ± 0.3V
5.11
Switching Characteristics, VCCA = 5.0 ± 0.5V
5.12
Operating Characteristics
5.13
Typical Characteristics
6
Parameter Measurement Information
6.1
Load Circuit and Voltage Waveforms
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
CMOS Schmitt-Trigger Inputs with Integrated Pulldowns
7.3.1.1
Inputs with Integrated Static Pull-Down Resistors
7.3.2
Control Logic (OE) with VCC(MIN) Circuitry
7.3.3
Balanced High-Drive CMOS Push-Pull Outputs
7.3.4
VCC Isolation and VCC Disconnect
7.3.5
Over-Voltage Tolerant Inputs
7.3.6
Glitch-Free Power Supply Sequencing
7.3.7
Negative Clamping Diodes
7.3.8
Fully Configurable Dual-Rail Design
7.3.9
Supports High-Speed Translation
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curve
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Device Support
9.1.1
Regulatory Requirements
9.2
Documentation Support
9.2.1
Related Documentation
9.3
ドキュメントの更新通知を受け取る方法
9.4
サポート・リソース
9.5
Trademarks
9.6
静電気放電に関する注意事項
9.7
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DBV|6
DTQ|6
DCK|6
DRY|6
サーマルパッド・メカニカル・データ
DRY|6
QFND138E
発注情報
jajsmi4a_oa
jajsmi4a_pm
7.3
Feature Description