JAJSU92A
April 2024 – June 2024
UCC21231
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Ratings
5.6
Insulation Specifications
5.7
Safety Limiting Values
5.8
Electrical Characteristics
5.9
Switching Characteristics
5.10
Insulation Characteristics Curves
5.11
Typical Characteristics
6
Parameter Measurement Information
6.1
Propagation Delay and Pulse Width Distortion
6.2
Rising and Falling Time
6.3
Input and Enable Response Time
6.4
Programmable Dead Time
6.5
Power-up UVLO Delay to OUTPUT
6.6
CMTI Testing
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDD, VCCI, and Undervoltage Lock Out (UVLO)
7.3.2
Input and Output Logic Table
7.3.3
Input Stage
7.3.4
Output Stage
7.3.5
Diode Structure in the UCC21231
7.4
Device Functional Modes
7.4.1
Enable Pin
7.4.2
Programmable Dead-Time (DT) Pin
7.4.2.1
Tying the DT Pin to VCC
7.4.2.2
DT Pin Connected to a Programming Resistor between DT and GND Pins
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Designing INA/INB Input Filter
8.2.2.2
Select External Bootstrap Diode and its Series Resistor
8.2.2.3
Gate Driver Output Resistor
8.2.2.4
Gate to Source Resistor Selection
8.2.2.5
Estimate Gate Driver Power Loss
8.2.2.6
Estimating Junction Temperature
8.2.2.7
Selecting VCCI, VDDA/B Capacitor
8.2.2.7.1
Selecting a VCCI Capacitor
8.2.2.7.2
Selecting a VDDA (Bootstrap) Capacitor
8.2.2.7.3
Select a VDDB Capacitor
8.2.2.8
Dead Time Setting Guidelines
8.2.2.9
Application Circuits with Output Stage Negative Bias
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Device Support
11.1.1
サード・パーティ製品に関する免責事項
11.2
Documentation Support
11.2.1
Related Documentation
11.3
Certifications
11.4
ドキュメントの更新通知を受け取る方法
11.5
サポート・リソース
11.6
Trademarks
11.7
静電気放電に関する注意事項
11.8
用語集
12
Revision History
13
Mechanical, Packaging, and Orderable Information
13.1
Tape and Reel Information
13.2
Mechanical Data
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DLG|13
サーマルパッド・メカニカル・データ
発注情報
jajsu92a_oa
5.10
Insulation Characteristics Curves
Figure 5-1
Thermal Derating Curve for Safety Limiting Current (current in each channel with both channels running simultaneously)
Figure 5-2
Thermal Derating Curve for Safety Limiting Power