JAJSCB0F
June 2016 – November 2024
UCC21520
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
概要 (続き)
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety Limiting Values
6.8
Electrical Characteristics
6.9
Timing Requirements
6.10
Switching Characteristics
6.11
Insulation Characteristics Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay and Pulse Width Distortion
7.2
Rising and Falling Time
7.3
Input and Disable Response Time
7.4
Programable Dead Time
7.5
Power-up UVLO Delay to OUTPUT
7.6
CMTI Testing
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VDD, VCCI, and Undervoltage Lock Out (UVLO)
8.3.2
Input and Output Logic Table
8.3.3
Input Stage
8.3.4
Output Stage
8.3.5
Diode Structure in the UCC21520 and the UCC21520A
8.4
Device Functional Modes
8.4.1
Disable Pin
8.4.2
Programmable Dead-Time (DT) Pin
8.4.2.1
Tying the DT Pin to VCC
8.4.2.2
DT Pin Connected to a Programming Resistor Between DT and GND Pins
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Designing INA/INB Input Filter
9.2.2.2
Select External Bootstrap Diode and its Series Resistor
9.2.2.3
Gate Driver Output Resistor
9.2.2.4
Gate to Source Resistor Selection
9.2.2.5
Estimate Gate Driver Power Loss
9.2.2.6
Estimating Junction Temperature
9.2.2.7
Selecting VCCI, VDDA/B Capacitor
9.2.2.7.1
Selecting a VCCI Capacitor
9.2.2.7.2
Selecting a VDDA (Bootstrap) Capacitor
9.2.2.7.3
Select a VDDB Capacitor
9.2.2.8
Dead Time Setting Guidelines
9.2.2.9
Application Circuits with Output Stage Negative Bias
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
サード・パーティ製品に関する免責事項
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Certifications
12.4
ドキュメントの更新通知を受け取る方法
12.5
サポート・リソース
12.6
Trademarks
12.7
静電気放電に関する注意事項
12.8
用語集
13
Revision History
14
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DW|16
サーマルパッド・メカニカル・データ
DW|16
QFND505A
発注情報
jajscb0f_oa
jajscb0f_pm
12
Device and Documentation Support