JAJSME3B March 2022 – January 2023 UCC21737-Q1
PRODUCTION DATA
In the applications of a traction inverter or motor drive, the power semiconductors are in hard switching mode. With the strong device drive strength, the dV/dt can be high, especially for a SiC MOSFET. Noise cannot only be coupled to the gate voltage due to the parasitic inductance, but also to the input side as the nonideal PCB layout and coupled capacitance.
The UCC21737-Q1 features a 40-ns internal deglitch filter to the IN+, IN-, and RST/EN pins. Any signal less than 40 ns can be filtered out from the input pins. For noisy systems, an external low-pass filter can be added externally to the input pins. Adding low-pass filters to the IN+, IN-, and RST/EN pins can effectively increase noise immunity and increase signal integrity. When not in use, the IN+, IN-, and RST/EN pins should not be floating. IN- should be tied to GND if only IN+ is used for a noninverting input to output configuration. The purpose of the low-pass filter is to filter out high frequency noise generated by the layout parasitics. While choosing the low-pass filter resistors and capacitors, both the noise immunity effect and delay time should be considered according to the system requirements.