JAJSU20A December 2023 – April 2024 UCC23525
ADVANCE INFORMATION
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UVLO function is implemented for VDD and VSS pins to prevent an under-driven condition on IGBTs and MOSFETs. When VDD is lower than UVLOR at device start-up or lower than UVLOF after start-up, the voltage-supply UVLO feature holds the effected output low, regardless of the input forward current as shown in Table 7-1. The VDD UVLO protection has a hysteresis feature (UVLOhys). This hysteresis prevents chatter when the power supply produces ground noise which allows the device to permit small drops in bias voltage, which occurs when the device starts switching and operating current consumption increases suddenly.
When VDD drops below UVLOF, a delay, tUVLO_rec occurs on the output when the supply voltage rises above UVLOR again.