JAJSU20A
December 2023 – April 2024
UCC23525
ADVANCE INFORMATION
1
1
特長
2
アプリケーション
3
概要
4
Pin Configuration and Function
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Power Ratings
5.6
Insulation Specifications
5.7
Safety Limiting Values
5.8
Electrical Characteristics
5.9
Switching Characteristics
5.10
Thermal Derating Curves
5.11
Typical Characteristics
6
Parameter Measurement Information
6.1
Propagation Delay, Rise Time and Fall Time
6.2
IOH and IOL Testing
6.3
CMTI Testing
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Power Supply
7.3.2
Input Stage
7.3.3
Output Stage
7.3.4
Protection Features
7.3.4.1
Undervoltage Lockout (UVLO)
7.3.4.2
Active Pulldown
7.3.4.3
Short-Circuit Clamping
7.3.4.4
ESD Structure
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Selecting the Input Resistor
8.2.2.2
Gate Driver Output Resistor
8.2.2.3
Estimate Gate-Driver Power Loss
8.2.2.4
Estimating Junction Temperature
8.2.2.5
Selecting VDD Capacitor
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
PCB Material
11
Device and Documentation Support
11.1
Device Support
11.1.1
サード・パーティ製品に関する免責事項
11.2
Documentation Support
11.2.1
Related Documentation
11.3
ドキュメントの更新通知を受け取る方法
11.4
サポート・リソース
11.5
Trademarks
11.6
静電気放電に関する注意事項
11.7
用語集
12
Revision History
13
Mechanical, Packaging, and Orderable Information
13.1
Package Option Addendum
13.2
Tape and Reel Information
13.3
Mechanical Data
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
DWY|6
サーマルパッド・メカニカル・データ
7.3
Feature Description