JAJSC46B February 2011 – July 2015 UCC27200A , UCC27201A
PRODUCTION DATA.
PIN | I/O | DESCRIPTION | |||
---|---|---|---|---|---|
NAME | DRM/D/DDA | DRC | DPR | ||
VDD | 1 | 1 | 1 | I | Positive supply to the lower gate driver. De-couple this pin to VSS (GND). Typical decoupling capacitor range is 0.22 μF to 1.0 μF. |
HB | 2 | 2 | 2 | I | High-side bootstrap supply. The bootstrap diode is on-chip but the external bootstrap capacitor is required. Connect positive side of the bootstrap capacitor to this pin. Typical range of HB bypass capacitor is 0.022 μF to 0.1 μF, the value is dependant on the gate charge of the high-side MOSFET however. |
HO | 3 | 3 | 3 | O | High-side output. Connect to the gate of the high-side power MOSFET. |
HS | 4 | 4 | 4 | I | High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. |
HI | 5 | 6 | 7 | I | High-side input. |
LI | 6 | 7 | 8 | I | Low-side input. |
VSS | 7 | 8 | 9 | O | Negative supply terminal for the device which is generally grounded. |
LO | 8 | 9 | 10 | O | Low-side output. Connect to the gate of the low-side power MOSFET. |
N/C | — | 5 | 5/6 | — | No connection. Pins labeled N/C have no connection. |
PowerPAD(1) | — | — | — | — | Connect to a large thermal mass trace or GND plane to dramatically improve thermal performance. |