SLUSEY5
July 2024
UCC27301A
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Timing Diagrams
5.8
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Input Stages and Interlock
6.3.2
Enable
6.3.3
Undervoltage Lockout (UVLO)
6.3.4
Level Shifter
6.3.5
Boot Diode
6.3.6
Output Stages
6.3.7
Negative Voltage Transients
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Input Threshold Type
7.2.2.2
VDD Bias Supply Voltage
7.2.2.3
Peak Source and Sink Currents
7.2.2.4
Propagation Delay
7.2.2.5
Power Dissipation
7.2.3
Application Curves
8
Power Supply Recommendations
9
Layout
9.1
Layout Guidelines
9.2
Layout Example
9.3
Thermal Considerations
10
Device and Documentation Support
10.1
Device Support
10.1.1
Third-Party Products Disclaimer
10.2
Documentation Support
10.2.1
Related Documentation
10.3
Receiving Notification of Documentation Updates
10.4
Support Resources
10.5
Trademarks
10.6
Electrostatic Discharge Caution
10.7
Glossary
11
Revision History
12
Mechanical, Packaging, and Orderable Information
12.1
Package Option Addendum
12.2
Tape and Reel Information
12.3
Mechanical Data
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
D|8
DRC|10
サーマルパッド・メカニカル・データ
DRC|10
QFND013N
9.2
Layout Example
Figure 9-1
UCC27301A
PCB Layout Example for SOIC package
Figure 9-2
UCC27301A
PCB Layout Example for VSON package