JAJSNS2A
may 2022 – july 2023
UCC27444-Q1
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Diagrams
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Operating Supply Current
7.3.2
Input Stage
7.3.3
Enable Function
7.3.4
Output Stage
7.3.5
Low Propagation Delays and Tightly Matched Outputs
7.4
Device Functional Modes
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
VDD and Power On Reset
8.2.2.2
Drive Current and Power Dissipation
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
10.3
Thermal Considerations
11
Device and Documentation Support
11.1
サード・パーティ製品に関する免責事項
11.2
ドキュメントの更新通知を受け取る方法
11.3
サポート・リソース
11.4
Trademarks
11.5
静電気放電に関する注意事項
11.6
用語集
12
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
D|8
MSOI002K
DGN|8
MPDS046F
サーマルパッド・メカニカル・データ
DGN|8
PPTD388A
発注情報
jajsns2a_oa
11
Device and Documentation Support