JAJSEV8A March   2018  – January 2024 UCC27511A

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 Handling Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 VDD and Undervoltage Lockout
      2. 6.3.2 Operating Supply Current
      3. 6.3.3 Input Stage
      4. 6.3.4 Enable Function
      5. 6.3.5 Output Stage
      6. 6.3.6 Low Propagation Delays
    4. 6.4 Device Functional Modes
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Input-to-Output Logic
        2. 7.2.2.2 Input Threshold Type
        3. 7.2.2.3 VDD Bias Supply Voltage
        4. 7.2.2.4 Peak Source and Sink Currents
        5. 7.2.2.5 Enable and Disable Function
        6. 7.2.2.6 Propagation Delay
        7. 7.2.2.7 Thermal Information
        8. 7.2.2.8 Power Dissipation
      3. 7.2.3 Application Curves
  9. 8 Power Supply Recommendations
  10. 9 Layout
    1. 9.1 Layout Guidelines
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 サード・パーティ製品に関する免責事項
    2. 10.2 ドキュメントの更新通知を受け取る方法
    3. 10.3 サポート・リソース
    4. 10.4 Trademarks
    5. 10.5 静電気放電に関する注意事項
    6. 10.6 用語集
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.2.2.8 Power Dissipation

Power dissipation of the gate driver has two portions as shown in Equation 1.

Equation 1. GUID-30C8C568-006A-4B53-B7F4-2F8E391EC5FB-low.gif

where

  • PD is the power dissipation
  • PD(DC) is the DC portion of the power dissipation
  • PD(SW) is the power dissipated in the gate-driver package during switching

Use Equation 2 to calculate the DC portion of the power dissipation.

Equation 2. GUID-3107608A-CC3C-4BFA-9CD1-EE15BC7612D5-low.gif

where

  • IQ is the quiescent current for the driver

The quiescent current is the current consumed by the device to bias all internal circuits such as input stage, reference voltage, logic circuits, protections, and also any current associated with switching of internal devices when the driver output changes state (such as charging and discharging of parasitic capacitances, parasitic shoot-through, and others). The UCC27511A device features very low quiescent currents (less than 1 mA, see Figure 5-7) and contains internal logic to eliminate any shoot-through in the output driver stage. Thus the effect of the PD(DC) on the total power dissipation within the gate driver can be assumed to be negligible.

The power dissipated in the gate-driver package during switching (PD(SW)) depends on the following factors:

  • The gate charge required of the power device (usually a function of the drive voltage VG, which is very close to input bias supply voltage VDD because of low VO(H) drop-out).
  • The switching frequency (ƒS)
  • Use of external gate resistors (R(GATE))

When a driver device is tested with a discrete, capacitive load calculating the power that is required from the bias supply is fairly simple. The energy to charge the capacitor is given by Equation 3.

Equation 3. GUID-EA67052D-7E54-459B-A4A4-0C8D82441650-low.gif

Where

  • C(LOAD) is load capacitor
  • VDD is bias voltage feeding the driver
  • EG is the energy stored in the capacitor when it is charged to VDD

An equal amount of energy dissipates when the capacitor is charged which leads to a total power loss given by Equation 4.

Equation 4. GUID-29AB4524-6CA7-4AFD-B6A3-D50910E5F85B-low.gif

where

  • Ptot is the total power loss
  • ƒS is the switching frequency

The switching load presented by a power MOSFET or IGBT is converted to an equivalent capacitance by examining the gate charge required to switch the device. This gate charge includes the effects of the input capacitance plus the added charge needed to swing the drain voltage of the power device as it switches between the ON and OFF states. Most manufacturers provide specifications of typical and maximum gate charge, in nC, to switch the device under specified conditions. Using the gate charge, QG, determine the power that must be dissipated when charging a capacitor (calculated using Equation 5, to provide Equation 6).

Equation 5. GUID-3BEF3116-B7A6-406D-9764-9AFCC2A69357-low.gif
Equation 6. GUID-7BDCA9A1-2258-4E08-AB6F-C064DCE02095-low.gif

This power, Ptot, is dissipated in the resistive elements of the circuit when the MOSFET or IGBT is being turned on or off. Half of the total power is dissipated when the load capacitor is charged during turnon, and the other half is dissipated when the load capacitor is discharged during turnoff. When no external gate resistor is employed between the driver and MOSFET or IGBT, this power is completely dissipated inside the driver package. With the use of external gate-drive resistors, the power dissipation is shared between the internal resistance of driver and external gate resistor in accordance to the ratio of the resistance (more power dissipated in the higher resistance component). Based on this simplified analysis, the driver power dissipation during switching is calculated in Equation 7.

Equation 7. GUID-D4D5DF5C-6F0C-4602-9B2C-2609C4A2546D-low.gif

where

  • R(OFF) = RO(L)
  • R(ON) (effective resistance of pullup structure) = 2.7 × RO(L)