JAJSEV8A March 2018 – January 2024 UCC27511A
PRODUCTION DATA
The UCC27511A device features very low quiescent IDD currents. The typical operating-supply current in undervoltage-lockout (UVLO) state and fully-on state (under static and switching conditions) are summarized in Figure 5-5, Figure 5-6 and Figure 5-7. The IDD current when the device is fully on and outputs are in a static state (DC high or DC low, refer Figure 5-7) represents lowest quiescent IDD current when all the internal logic circuits of the device are fully operational. The total supply current is the sum of the quiescent IDD current, the average IO current because of switching, and finally any current related to pullup resistors on the unused input pin. For example, when the inverting input pin is pulled low additional current is drawn from the VDD supply through the pullup resistors (see Section 6.2). Knowing the operating frequency (ƒS) and the MOSFET gate (QG) charge at the drive voltage being used, the average IO current can be calculated as product of QG and ƒS.
A complete characterization of the IDD current as a function of switching frequency at different VDD bias voltages under 1.8-nF switching load is provided in Figure 5-15. The strikingly linear variation and close correlation with the theoretical value of the average IO indicates negligible shoot-through inside the gate-driver device attesting to the high-speed characteristics.