The primary purpose of the VSENSE input is to provide the voltage feedback from the output to the voltage control loop. Thus, a traditional resistor-divider network must be sized and connected between the output capacitor and the VSENSE pin to set the desired output voltage based on the 3V regulation voltage on VSENSE.

A unique aspect of the UCC28070A is the need to place the same resistor-divider network on the V_IN side of the inductor to the VINAC pin. This provides the scaled input voltage monitoring needed for the linear multiplier and current synthesizer circuitry. It is not required that the actual resistance of the VINAC network be identical to the VSENSE network, but it is necessary that the attenuation (k_R) of the two divider networks be equivalent for proper PFC operation.

Equation 11.

In noisy environments, it may be beneficial for small filter capacitors to be applied to the VSENSE and VINAC inputs to avoid the destabilizing effects of excessive noise on these inputs. If applied, the RC time-constant must not exceed 100μs on the VSENSE input to avoid significant delay in the output transient response. The RC time-constant must also not exceed 100μs on the VINAC input to avoid degrading of the wave-shape zero-crossings. Usually, a time constant of 3 / f_PWM is adequate to filter out typical noise on VSENSE and VINAC. Some design and test iteration may be required to find the optimal amount of filtering required in a particular application.