JAJS121G September   2003  – April 2017 UCC28220 , UCC28221

PRODUCTION DATA.  

  1. 1 特長
  2. 2 アプリケーション
  3. 3 概要
  4. 4 改訂履歴
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 VDD
      2. 8.3.2 Reference
      3. 8.3.3 Oscillator Operation and Maximum Duty Cycle Setpoint
      4. 8.3.4 Soft Start
      5. 8.3.5 Current Sense
      6. 8.3.6 Output Drivers
    4. 8.4 Device Functional Modes
      1. 8.4.1 Line Overvoltage and Undervoltage
      2. 8.4.2 Start-Up JFET Section
      3. 8.4.3 Slope Compensation
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Overvoltage Protection and Undervoltage Lockout
        2. 9.2.2.2 Peak Current Limit
        3. 9.2.2.3 Current Sense Transformer Reset Resistor (T1 and T2)
        4. 9.2.2.4 Oscillator and Maximum Duty Cycle Clamp
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12デバイスおよびドキュメントのサポート
    1. 12.1 ドキュメントのサポート
      1. 12.1.1 関連資料
    2. 12.2 関連リンク
    3. 12.3 ドキュメントの更新通知を受け取る方法
    4. 12.4 コミュニティ・リソース
    5. 12.5 商標
    6. 12.6 静電気放電に関する注意事項
    7. 12.7 Glossary
  13. 13メカニカル、パッケージ、および注文情報

パッケージ・オプション

デバイスごとのパッケージ図は、PDF版データシートをご参照ください。

メカニカル・データ（パッケージ｜ピン）
  • PW|16
  • D|16
サーマルパッド・メカニカル・データ
発注情報

7 Specifications

7.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
High-voltage start-up input, VIN 110 V
Supply voltage, VDD 15 V
Output current (OUT1, OUT2) dc, IOUT(dc) ±10 mA
OUT1/ OUT2 capacitive load 200 pF
REF output current, IREF 10 mA
Current sense inputs, CS1, CS2 –1 2 V
Analog inputs (CHG, DISCHG, SLOPE, REF, CNTRL) –0.3 3.6 V
Analog inputs (SS, LINEOV, LINEUV, LINEHYS) –0.3 7 V
Power dissipation at TA = 25°C PW package 400 mW
D package 650
Junction operating temperature, TJ –55 150 °C
Storage temperature, Tstg –65 150 °C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

7.2 ESD Ratings

VALUE UNIT
V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2500 V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
VIN High-voltage start-up input 36 76 V
VDD Supply voltage 8.4 14.5 V

7.4 Thermal Information

THERMAL METRIC(1) UCC28220, UCC28221 UCC28221 UNIT
D (SOIC) PW (TSSOP) PW (TSSOP)
16 PINS 16 PINS 20 PINS
RθJA Junction-to-ambient thermal resistance 73 100.9 92.5 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 32.6 28.8 27.6 °C/W
RθJB Junction-to-board thermal resistance 30.6 46.6 43.7 °C/W
ψJT Junction-to-top characterization parameter 5.7 1.4 1.4 °C/W
ψJB Junction-to-board characterization parameter 30.3 46 43.2 °C/W
RθJC(bot) Junction-to-case (bottom) thermal resistance — — — °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

7.5 Electrical Characteristics

VDD = 12 V, 0.1-µF capacitor from VDD to GND, 0.1-µF capacitor from REF to GND, FOSC = 1 MHz, TA = –40°C to 105°C, and TA = TJ (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OVERALL
Operating VDD 8.4 14.5 V
Quiescent current SS = 0 V, no switching, FOSC = 1 MHz 1.5 3 4 mA
Operating current Outputs switching, FOSC = 1 MHz 1.6 3.5 6 mA
START-UP
Startup current UCC28220, VDD < (UVLO – 0.8) 200 µA
UVLO start threshold UCC28220 9.5 10 10.5 V
UCC28221 12.3 13 13.7
UVLO stop threshold 7.6 8 8.4 V
UVLO hysteresis UCC28220 1.8 2 2.2 V
UCC28221 4.8 5 5.2
JFET ON threshold SS = 0, outputs not switching, VDD decreasing 9.5 10 10.5 V
SS = 2 V, Cntrl = 2 V, output switching, VDD decreasing; same threshold as UVLO stop 7.6 8 8.4
High voltage JFET current VIN = 36 V to 76 V, VDD = 0 V 16 48 100 mA
VIN = 36 V to 76 V, VDD = 10 V 4 16 40
VIN = 36 V to 76 V, VDD < UVLO 4 12 40
JFET leakage VIN = 36 V to 76 V, VDD = 14 V 100 µA
REFERENCE
Output voltage 8 V < VDD < 14 V, ILOAD = 0 mA to –10 mA 3.15 3.3 3.45 V
Output current Outputs not switching, CNTRL = 0 V 10 mA
Output short-circuit current VREF = 0 V –40 –20 –10 mA
VREF UVLO 2.55 3 3.25 V
SOFT START
SS charge current RCHG = 10.2 kΩ, SS = 0 V –70 –100 –130 µA
SS discharge current RCHG = 10.2 kΩ, SS = 2 V 70 100 130 µA
SS initial voltage LINEOV = 2 V, LINEUV = 0 V 0.5 1 1.5 V
SS voltage at 0% dc Point at which output starts switching 0.5 1.2 1.8 V
SS voltage ratio 75% 90% 100%
SS max voltage LINEOV = 0 V, LINEUV = 2 V 3 3.5 4 V
OSCILLATOR AND PWM
Output frequency RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ 450 500 550 kHz
Oscillator frequency RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ 900 1000 1100 kHz
Output maximum duty cycle RCHG = 10.2 kΩ, RDISCHG = 10.2 kΩ,
measured at OUT1 and OUT2		 73% 75% 77%
CHG voltage 2 2.5 3 V
DSCHG voltage 2 2.5 3 V
SLOPE COMPENSATION
Slope RSLOPE = 75 kΩ, RCH = 66 kΩ,
RDISCHG = 44 kΩ, Csx = 0 V to 0.5 V		 140 200 260 mV/us
Channel matching RSLOPE = 75 kΩ, Csx = 0 V 0% 10%
CURRENT SENSE
CS1, CS2 bias current CS1 = 0, CS2 = 0 –500 0 500 nA
Prop delay CSx to OUTx CSx input 0 V to 1.5 V step 40 85 ns
CS1, CS2 sink current CSx = 2 V 2.3 4.5 7 mA
CNTRL
Resistor ratio(1) 0.6
Ctrl input current CTRL = 0 V and 3.3 V –100 0 100 nA
Ctrl voltage at 0% dc CSx = 0 V, point at which output starts switching (checks resistor ratio) 0.5 1.2 1.8 V
OUTPUT (OUT1, OUT2)
Low level IOUT = 10 mA 0.4 1 V
High level IOUT = −10 mA, VREF – VOUT 0.4 1 V
Rise time CLOAD = 50 pF 10 20 ns
Fall time CLOAD = 50 pF 10 20 ns
LINE SENSE
LINEOV threshold TA = 25°C 1.24 1.26 1.28 V
TA = –40°C to 105°C 1.235 1.26 1.285
LINEUV threshold TA = 25°C 1.24 1.26 1.28 V
TA = –40°C to 105°C 1.235 1.26 1.285
LINEHYST pullup voltage LINEOV = 2 V, LINEUV = 2 V 3.1 3.25 3.4 V
LINEHYST off leakage LINEOV = 0 V, LINEUV = 2 V –500 0 500 nA
LINEHYS pullup resistance I = –20 µA 100 500 Ω
LINEHYS pulldown resistance I = 20 µA 100 500 Ω
LINEOV, LINEUV bias I LINEOV = 1.25 V, LINEUV = 1.25 V –500 500 nA
(1) Ensured by design. Not 100% tested in production.

7.6 Typical Characteristics

UCC28220 UCC28221 graph_01_slus544.gif Figure 1. UVLO Thresholds vs Temperature
UCC28220 UCC28221 graph_03_slus544.gif Figure 3. Supply Current vs Supply Voltage
UCC28220 UCC28221 graph_05_slus544.gif Figure 5. LINEOV and LINEUV Thresholds vs Temperature
UCC28220 UCC28221 graph_07_slus544.gif Figure 7. Programming Resistor vs Slope Compensation
UCC28220 UCC28221 graph_09_slus544.gif
CL = 50 pF
Figure 9. Rise and Fall Time vs Temperature
UCC28220 UCC28221 graph_11_slus544.gif Figure 11. Soft-Start Charge Current vs Temperature
UCC28220 UCC28221 graph_13_slus544.gif Figure 13. Programming Resistors vs Switching Frequency
UCC28220 UCC28221 graph_15_slus544.gif Figure 15. Programmable Max Duty Cycle vs Temperature
UCC28220 UCC28221 graph_02_slus544.gif Figure 2. Quiescent Current vs Supply Voltage
UCC28220 UCC28221 graph_04_slus544.gif Figure 4. Reference Voltage vs Temperature
UCC28220 UCC28221 graph_06_slus544.gif Figure 6. Slope Compensation vs Temperature
UCC28220 UCC28221 graph_08_slus544.gif Figure 8. Channel1 and Channel2 Slope Matching
vs Temperature
UCC28220 UCC28221 graph_10_slus544.gif
space
Figure 10. VOH and VOL vs Temperature
UCC28220 UCC28221 graph_12_slus544.gif Figure 12. Soft-Start Discharge Current vs Temperature
UCC28220 UCC28221 graph_14_slus544.gif Figure 14. Oscillator Frequency vs Temperature
UCC28220 UCC28221 graph_16_slus544.gif Figure 16. CSx to OUTx Delay vs CSx Peak Voltage