JAJSOG3 December   2023 UCC28750

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Descriptions
      1. 7.3.1 VDD - Input Bias
      2. 7.3.2 DRV - Gate Drive Out
      3. 7.3.3 CS - Current Sensing
      4. 7.3.4 FB - Feedback
      5. 7.3.5 FLT - Fault
      6. 7.3.6 GND - Ground Return
    4. 7.4 Feature Description
      1. 7.4.1 Soft Start
      2. 7.4.2 Control Law
      3. 7.4.3 Frequency Dithering
      4. 7.4.4 Fault Protections
        1. 7.4.4.1 VDD Overvoltage and Undervoltage Lockout
        2. 7.4.4.2 Internal Overtemperature Protection
        3. 7.4.4.3 Output Overpower Protection
        4. 7.4.4.4 Output Short-Circuit Protection
        5. 7.4.4.5 FLT Pin Protections
      5. 7.4.5 Slope Compensation
    5. 7.5 Device Functional Modes
      1. 7.5.1 Off
      2. 7.5.2 Startup
      3. 7.5.3 On
      4. 7.5.4 Fault
      5. 7.5.5 Disabled
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Bulk Capacitance with Minimum Bulk Voltage
        2. 8.2.3.2 Transformer Turns Ratio and Inductance
        3. 8.2.3.3 Current Sense and Slope Compensation Network
        4. 8.2.3.4 Output Capacitors
        5. 8.2.3.5 VDD Capacitance, CVDD
      4. 8.2.4 Application Performance Plots
        1. 8.2.4.1 Startup
        2. 8.2.4.2 Load Transients
        3. 8.2.4.3 Q1 Drain Voltage Evaluation
      5. 8.2.5 What to Do and What Not to Do
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.3.5 FLT - Fault

The FLT pin is a programmable protection pin that shuts down the device in unwanted conditions. The UCC28750 device has two versions of the FLT pin: a programmable brown-in/brown-out detection version, and over-temperature and over-voltage version. All versions of the device can disable the system by pulling the FLT pin below 0.5V, VFLT(dis). There is no delay in exiting the disable state when the FLT pin is raised above the VFLT(dis) threshold.

The brown-in/out fault detection monitors the rectified bulk voltage in a flyback application and stops switching operation when the line voltage drops below a programmed threshold longer than 45ms, tbrown-out. The brown-out fault resumes switching operation immediately when the FLT pin voltage goes above the brown-out threshold and does not wait for a new VDD fault cycle.

The overvoltage protection fault triggers when the FLT pin rises above VFLT(ovp) for three consecutive switching cycles. Care is required when designing the overvoltage circuit such that the current going into the FLT pin does not exceed 5mA. If the FLT pin voltage drops below 1.0V, VFLT(tsd), for 32 switching cycles then the overtemperature protection response is triggered.

The FLT pin can be left floating, or open, for only the UCC287502/4/6/8 variants. If the pin is left floating in UCC287501/3/5/7 variants that have the brown-out feature the device does not start up as the FLT pin is in a disable state. At startup with the brown-out configuration there is no current sourced from the FLT pin to raise the pin voltage above protection levels.

More information on the operation and programming of the FLT pin is found in section Section 7.4.4.

GUID-20230801-SS0I-M3QT-FMHN-L7QSDS7VZ3CR-low.svg Figure 7-7 FLT Pin Block Diagram