JAJSOG3 December   2023 UCC28750

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 概要
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Detailed Pin Descriptions
      1. 7.3.1 VDD - Input Bias
      2. 7.3.2 DRV - Gate Drive Out
      3. 7.3.3 CS - Current Sensing
      4. 7.3.4 FB - Feedback
      5. 7.3.5 FLT - Fault
      6. 7.3.6 GND - Ground Return
    4. 7.4 Feature Description
      1. 7.4.1 Soft Start
      2. 7.4.2 Control Law
      3. 7.4.3 Frequency Dithering
      4. 7.4.4 Fault Protections
        1. 7.4.4.1 VDD Overvoltage and Undervoltage Lockout
        2. 7.4.4.2 Internal Overtemperature Protection
        3. 7.4.4.3 Output Overpower Protection
        4. 7.4.4.4 Output Short-Circuit Protection
        5. 7.4.4.5 FLT Pin Protections
      5. 7.4.5 Slope Compensation
    5. 7.5 Device Functional Modes
      1. 7.5.1 Off
      2. 7.5.2 Startup
      3. 7.5.3 On
      4. 7.5.4 Fault
      5. 7.5.5 Disabled
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Application
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Input Bulk Capacitance with Minimum Bulk Voltage
        2. 8.2.3.2 Transformer Turns Ratio and Inductance
        3. 8.2.3.3 Current Sense and Slope Compensation Network
        4. 8.2.3.4 Output Capacitors
        5. 8.2.3.5 VDD Capacitance, CVDD
      4. 8.2.4 Application Performance Plots
        1. 8.2.4.1 Startup
        2. 8.2.4.2 Load Transients
        3. 8.2.4.3 Q1 Drain Voltage Evaluation
      5. 8.2.5 What to Do and What Not to Do
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 ドキュメントの更新通知を受け取る方法
    3. 9.3 サポート・リソース
    4. 9.4 Trademarks
    5. 9.5 静電気放電に関する注意事項
    6. 9.6 用語集
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

パッケージ・オプション

メカニカル・データ（パッケージ｜ピン）
サーマルパッド・メカニカル・データ
発注情報

7.4.4.5 FLT Pin Protections

The FLT pin is a programmable fault pin and changes operation basedo on the UCC28750 variant, whether the device is a brown-out or over-temperature/over-voltage version.

GUID-20230801-SS0I-S5NX-72KL-NWD9HPNX9MGB-low.svg Figure 7-17 FLT Pin Brown-out Configuration Example

The brown-out variant is a fault method to control the turn-on and turn-off thresholds of the system application. Once the system has crossed the turn-on (also known as brown-in) threshold, the UCC28750 turns on an offset current, typically 4μA, which makes the thresholds programmable. The offset current is turned on only after the bulk voltage passes the brown-in threshold first. The FLT pin voltage must cross the Vbrown-out threshold for tbrown-out for the brown-out fault to trigger. The time required to trigger the fault disqualifies any short term false triggering events from incorrectly triggering the brown-out. The FLT pin has a clamp internally that prevents the FLT pin from reaching dangerous levels if the application requires the brownout feature and has a wide input range requirement (such as a 100V,AC to 400V,AC operating range).

The top resistor shown in Figure 7-17 must not be a single resistor. Most non-high-voltage rated resistors typically have a voltage rating of around 200V. Therefore, the top resistor in the brownout resistor divider must be formed with several resistors, typically three.

Programming the brown-in and brown-out thresholds is a matter of choosing the desired voltage divider resistor values:

Equation 1. V b i = ( V brownout + 50 mV ) × ( R botop + R bobot ) R bobot
Equation 2. V bo = ( V brownout ) × ( R botop + R bobot ) - I brownout × R bobot × R botop R bobot

Where:

  • Vbi is the programmed brown-in input voltage level
  • Vbo is the resultant brown-out input voltage level
  • Vbrown-out is the FLT pin's brown-out threshold, 1.4V
  • Rbobot is the bottom resistor in the voltage divider
  • Rbotop is the top equivalent resistor in the voltage divider
  • Ibrown-out is the offset current enabled once the input voltage passes the Vbi level

GUID-20230801-SS0I-7TWS-6XLM-MVM6XQ16T7LG-low.svg Figure 7-18 FLT Pin Overvoltage/Overtemperature Configuration Example

The programmable over-voltage and over-temperature features are available in the UCC28750 variants. The overvoltage protection fault is triggered when the FLT pin voltage crosses 4V, VFLT(ovp), for three consecutive switching cycles, similar as the three switching cycles required for OVLO. In Figure 7-18, VSYS_OVP is a voltage source that can be used to triggeer the protection outside of the device VDD and system output voltage. If the overvoltage is configured with a Zener diode, then the following restriction applies:

Equation 3. V SYS_OVP > V Z - V FLT(ovp)

Where:

  • VZ is the breakdown voltage of the Zener diode
  • VSYS_OVP is a user defined location that is susceptible to over-voltage and is used to turn off the UCC28750
Care must be take that the current going into the FLT pin from the Zener diode's breakdown does not exceed 5mA. Therefore a current limiting resistor is recommended if a Zener diode is use for overvoltage protection on the FLT pin.

A different method can be applied as long as the voltage stays within the FLT pin's voltage rating.

The overtemperature fault is triggered when the FLT pin voltage crosses the 1V, VFLT(tsd), overtemperature threshold for 32 switching cycles, FLTdelay(tsd). Finally, the disable threshold of 0.5V ,VFLT(dis), stops switching operation immediately immediately.