JAJSOG3
December 2023
UCC28750
PRODUCTION DATA
1
1
特長
2
アプリケーション
3
概要
4
Device Comparison
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Requirements
6.8
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Detailed Pin Descriptions
7.3.1
VDD - Input Bias
7.3.2
DRV - Gate Drive Out
7.3.3
CS - Current Sensing
7.3.4
FB - Feedback
7.3.5
FLT - Fault
7.3.6
GND - Ground Return
7.4
Feature Description
7.4.1
Soft Start
7.4.2
Control Law
7.4.3
Frequency Dithering
7.4.4
Fault Protections
7.4.4.1
VDD Overvoltage and Undervoltage Lockout
7.4.4.2
Internal Overtemperature Protection
7.4.4.3
Output Overpower Protection
7.4.4.4
Output Short-Circuit Protection
7.4.4.5
FLT Pin Protections
7.4.5
Slope Compensation
7.5
Device Functional Modes
7.5.1
Off
7.5.2
Startup
7.5.3
On
7.5.4
Fault
7.5.5
Disabled
8
Application and Implementation
8.1
Application Information
8.2
Typical Application
8.2.1
Application
8.2.2
Design Requirements
8.2.3
Detailed Design Procedure
8.2.3.1
Input Bulk Capacitance with Minimum Bulk Voltage
8.2.3.2
Transformer Turns Ratio and Inductance
8.2.3.3
Current Sense and Slope Compensation Network
8.2.3.4
Output Capacitors
8.2.3.5
VDD Capacitance, CVDD
8.2.4
Application Performance Plots
8.2.4.1
Startup
8.2.4.2
Load Transients
8.2.4.3
Q1 Drain Voltage Evaluation
8.2.5
What to Do and What Not to Do
8.3
Power Supply Recommendations
8.4
Layout
8.4.1
Layout Guidelines
8.4.2
Layout Example
9
Device and Documentation Support
9.1
Documentation Support
9.1.1
Related Documentation
9.2
ドキュメントの更新通知を受け取る方法
9.3
サポート・リソース
9.4
Trademarks
9.5
静電気放電に関する注意事項
9.6
用語集
10
Revision History
11
Mechanical, Packaging, and Orderable Information
パッケージ・オプション
メカニカル・データ(パッケージ|ピン)
DBV|6
MPDS026Q
サーマルパッド・メカニカル・データ
発注情報
jajsog3_oa
6
Specifications