JAJSE40A
October 2017 – February 2018
UCC28780
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
概略回路図
45W、20VのGaN-ACFアダプタの効率
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information of SOIC
6.5
Thermal Information of WQFN
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Detailed Pin Description
7.3.1
BUR Pin (Programmable Burst Mode)
7.3.2
FB Pin (Feedback Pin)
7.3.3
VDD Pin (Device Bias Supply)
7.3.4
REF Pin (Internal 5-V Bias)
7.3.5
HVG and SWS Pins
7.3.6
RTZ Pin (Sets Delay for Transition Time to Zero)
7.3.7
RDM Pin (Sets Synthesized Demagnetization Time for ZVS Tuning)
7.3.8
RUN Pin (Driver Enable Pin)
7.3.9
SET Pin
7.4
Device Functional Modes
7.4.1
Adaptive ZVS Control with Auto-Tuning
7.4.2
Dead-Time Optimization
7.4.3
Control Law across Entire Load Range
7.4.4
Adaptive Amplitude Modulation (AAM)
7.4.5
Adaptive Burst Mode (ABM)
7.4.6
Low Power Mode (LPM)
7.4.7
Standby Power Mode (SBP)
7.4.8
Startup Sequence
7.4.9
Survival Mode of VDD
7.4.10
System Fault Protections
7.4.10.1
Brown-In and Brown-Out
7.4.10.2
Output Over-Voltage Protection
7.4.10.3
Over-Temperature Protection
7.4.10.4
Programmable Over-Power Protection
7.4.10.5
Peak Current Limit
7.4.10.6
Output Short-Circuit Protection
7.4.10.7
Over-Current Protection
7.4.10.8
Thermal Shutdown
7.4.11
Pin Open/Short Protections
7.4.11.1
Protections on CS pin Fault
7.4.11.2
Protections on HVG pin Fault
7.4.11.3
Protections on RDM and RTZ pin Faults
8
Application and Implementation
8.1
Application Information
8.2
Typical Application Circuit
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Input Bulk Capacitance and Minimum Bulk Voltage
8.2.2.2
Transformer Calculations
8.2.2.2.1
Primary-to-Secondary Turns Ratio (NPS)
8.2.2.2.2
Primary Magnetizing Inductance (LM)
8.2.2.2.3
Primary Turns (NP)
8.2.2.2.4
Secondary Turns (NS)
8.2.2.2.5
Turns of Auxiliary Winding (NA)
8.2.2.2.6
Winding and Magnetic Core Materials
8.2.2.3
Clamp Capacitor Calculation
8.2.2.4
Bleed-Resistor Calculation
8.2.2.5
Output Filter Calculation
8.2.2.6
Calculation of ZVS Sensing Network
8.2.2.7
Calculation of Compensation Network
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
General Considerations
10.1.2
RDM and RTZ Pins
10.1.3
SWS Pin
10.1.4
VS Pin
10.1.5
BUR Pin
10.1.6
FB Pin
10.1.7
CS Pin
10.1.8
GND Pin
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
ドキュメントのサポート
11.1.1
関連資料
11.2
ドキュメントの更新通知を受け取る方法
11.3
コミュニティ・リソース
11.4
商標
11.5
静電気放電に関する注意事項
11.6
Glossary
12
メカニカル、パッケージ、および注文情報
パッケージ・オプション
デバイスごとのパッケージ図は、PDF版データシートをご参照ください。
メカニカル・データ(パッケージ|ピン)
D|16
RTE|16
サーマルパッド・メカニカル・データ
RTE|16
QFND525B
発注情報
jajse40a_oa
jajse40a_pm
7.2
Functional Block Diagram